Output prediction logic: a high-performance CMOS design technique

Proceedings 2000 International Conference on Computer Design ◽

10.1109/iccd.2000.878293 ◽

2002 ◽

Author(s):

L. McMurchie ◽

S. Kio ◽

G. Yee ◽

T. Thorp ◽

C. Sechen

Keyword(s):

High Performance ◽

Design Technique ◽

Prediction Logic ◽

Cmos Design ◽

Output Prediction Logic

Download Full-text

A high-performance 64-bit adder implemented in output prediction logic

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 ◽

10.1109/arvlsi.2001.915562 ◽

2002 ◽

Author(s):

Sheng Sun ◽

L. McMurchie ◽

C. Sechen

Keyword(s):

High Performance ◽

Prediction Logic ◽

Output Prediction Logic

Download Full-text

Design High Performance Combinational Circuits Using Output Prediction Logic-OPL Technique

IOSR Journal of Electronics and Communication Engineering ◽

10.9790/2834-1202013641 ◽

2017 ◽

Vol 12 (02) ◽

pp. 36-41

Author(s):

Vikramaditya Dahiya ◽

Mr. Vikas Mittal

Keyword(s):

High Performance ◽

Combinational Circuits ◽

Prediction Logic ◽

Output Prediction Logic

Download Full-text

409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.2 ◽

2005 ◽

Author(s):

Sheng Sun ◽

Yi Han ◽

Xinyu Guo ◽

Kian Haur Chong ◽

L. McMurchie ◽

...

Keyword(s):

Prediction Logic ◽

Output Prediction Logic

Download Full-text

Simplified design technique for high-performance microstrip multisection couplers

IEEE Transactions on Microwave Theory and Techniques ◽

10.1109/22.739241 ◽

1998 ◽

Vol 46 (12) ◽

pp. 2507-2513 ◽

Author(s):

D.K.Y. Lau ◽

S.P. Marsh ◽

L.E. Davis ◽

R. Sloan

Keyword(s):

High Performance ◽

Design Technique

Download Full-text

Simplified design technique for high performance microstrip multi-section couplers

1998 IEEE MTT-S International Microwave Symposium Digest (Cat. No.98CH36192) ◽

10.1109/mwsym.1998.689338 ◽

2002 ◽

Author(s):

D. Lau ◽

S.P. Marsh ◽

L.E. Davis ◽

R. Sloan

Keyword(s):

High Performance ◽

Design Technique

Download Full-text

A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique

2011 International Symposium on Electronic System Design ◽

10.1109/ised.2011.59 ◽

2011 ◽

Author(s):

Manisha Pattanaik ◽

Shashank Parashar ◽

Chaudhry Indra Kumar ◽

Akanksha Chouhan ◽

Vikas Mahor

Keyword(s):

Low Power ◽

High Performance ◽

Logic Design ◽

Design Technique ◽

Power Noise ◽

Download Full-text

High throughput divider using output prediction logic

Research in Microelectronics and Electronics, 2005 PhD ◽

10.1109/rme.2005.1542964 ◽

2005 ◽

Author(s):

Xinyu Guo ◽

C. Sechen

Keyword(s):

High Throughput ◽

Prediction Logic ◽

Output Prediction Logic

Download Full-text

Low-Voltage Analog Switch in Deep Submicron CMOS: Design Technique and Experimental Measurements

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1093/ietfec/e89-a.4.1076 ◽

2006 ◽

Vol E89-A (4) ◽

pp. 1076-1087 ◽

Author(s):

C. J. B. FAYOMI

Keyword(s):

Low Voltage ◽

Deep Submicron ◽

Experimental Measurements ◽

Design Technique ◽

Analog Switch ◽

Cmos Design ◽

Download Full-text

A 64b adder using self-calibrating differential output prediction logic

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers ◽

10.1109/isscc.2006.1696231 ◽

2006 ◽

Author(s):

K.H. Chong ◽

L. McMurchie ◽

C. Sechen

Keyword(s):

Prediction Logic ◽

Output Prediction Logic

Download Full-text

Deep-submicron CMOS design of high-performance low-power flash/folding analog-to-digital converters

Canadian Conference on Electrical and Computer Engineering 2004 (IEEE Cat. No.04CH37513) ◽

10.1109/ccece.2004.1349722 ◽

2004 ◽

Author(s):

J. Liobe ◽

M. Margala

Keyword(s):

Low Power ◽

High Performance ◽

Deep Submicron ◽

Analog To Digital Converters ◽

Analog To Digital ◽

Cmos Design ◽

Download Full-text