scholarly journals MRONoC: A Low Latency and Energy Efficient on Chip Optical Interconnect Architecture

2017 ◽  
Vol 9 (1) ◽  
pp. 1-12 ◽  
Author(s):  
Huaxi Gu ◽  
Ke Chen ◽  
Yintang Yang ◽  
Zheng Chen ◽  
Bowen Zhang
Keyword(s):  
Energy Efficient ◽  
Optical Interconnect ◽  
Low Latency ◽  
On Chip

Low Latency and Energy Efficient Optical Network-on-Chip Using Wavelength Assignment

2012 ◽  
Vol 24 (24) ◽  
pp. 2296-2299 ◽  
Author(s):  
Zheng Chen ◽  
Huaxi Gu ◽  
Yintang Yang ◽  
Ke Chen
Keyword(s):  
Energy Efficient ◽  
Optical Network ◽  
Network On Chip ◽  
Wavelength Assignment ◽  
Low Latency ◽  
On Chip

Low latency, area, and energy efficient Hybrid Photonic Plasmonic on-chip Interconnects (HyPPI)

2016 ◽  
Author(s):  
Shuai Sun ◽  
Abdel-Hameed A. Badaway ◽  
Vikram Narayana ◽  
Tarek El-Ghazawi ◽  
Volker J. Sorger
Keyword(s):  
Energy Efficient ◽  
Low Latency ◽  
On Chip

Pre-allocated Path Based Low Latency Router Architecture for Network-on-chip

2014 ◽  
Vol 35 (2) ◽  
pp. 341-346
Author(s):  
Xiao-fu Zheng ◽  
Hua-xi Gu ◽  
Yin-tang Yang ◽  
Zhong-fan Huang
Keyword(s):  
Network On Chip ◽  
Low Latency ◽  
Router Architecture ◽  
On Chip
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