Bit-Error-Rate Degradation in a Multimode Fiber Optic Transmission Link Due to Modal Noise

SummaryDistributed mode-selective losses in a multimode fiber transmission link cause an accumulation of modal noise. A theory has been developed which gives an approximation of the signal-to-noise ratio at the end of the link due to the accumulated modal noise; it shows how this ratio is improved by mode-coupling in the fiber.

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Comparison on the sensitivity of fiber optic SONET OC-48 PIN-TIA receivers measured by using synchronous modulation intermixing technique and bit-error-rate tester

10.1117/12.520511 ◽

2004 ◽

Author(s):

Gong-Ru Lin ◽

Yu-Sheng Liao

Keyword(s):

Bit Error Rate ◽

Error Rate ◽

Fiber Optic

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Improvement of Bit Error Rate in Fiber Optic Communications

International Journal of Future Computer and Communication ◽

10.7763/ijfcc.2014.v3.312 ◽

2014 ◽

Vol 3 (4) ◽

pp. 281-286 ◽

Cited By ~ 1

Author(s):

Jahangir Alam S. M. ◽

M. Rabiul Alam ◽

Hu Guoqing ◽

Md. Zakirul Mehrab

Keyword(s):

Bit Error Rate ◽

Error Rate ◽

Fiber Optic ◽

Fiber Optic Communications

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Bit Error Rate Measurement For Evaluation Of A Fiber Optic Link

10.1117/12.975716 ◽

1976 ◽

Author(s):

Larry A. Bergman ◽

Alan R. Johnston

Keyword(s):

Bit Error Rate ◽

Error Rate ◽

Fiber Optic ◽

Rate Measurement

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FPGA based Multichannel Bit Error Rate Tester for Spacecraft Data Acquisition System

International Journal of Reconfigurable and Embedded Systems (IJRES) ◽

10.11591/ijres.v3.i2.pp76-84 ◽

2014 ◽

Vol 3 (2) ◽

pp. 76

Author(s):

Manoj Kumar A ◽

R V Nadagouda ◽

R Jegan

Keyword(s):

Bit Error Rate ◽

Error Rate ◽

Data Transmission ◽

Modulation Scheme ◽

Link Performance ◽

Ethernet Controller ◽

Transmission Link ◽

Spacecraft Data ◽

To Receive ◽

Ber Analysis

Bit Error Rate (BER) is a principle measure of data transmission link performance. BER tester (BERT) consists of a Pattern Generator and an Analyzer that can be set to the same pattern. The payload data transmitted from the spacecraft consists of one, two or three channels per carrier based on the modulation scheme. The traditional equipments can do BER analysis for only one channel at a time. In order to support multichannel BER analysis, a Personal Computer (PC) based system is designed and implemented in Altera Stratix II (EP2S130F1508C5N) FPGA. Ethernet is configured using WIZnet 5300 (Ethernet Controller) and it is used for communication between FPGA and PC with an application. Application is used to transmit the Pattern Generator’s configurations from PC to FPGA and to receive Analyzer’s status. Packet processing is done for this communication using User Datagram protocol (UDP). On the whole, traditional equipments are replaced by the designed and implemented bit error rate tester.

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