A 360-fs-Time-Resolution 7-bit Stochastic Time-to-Digital Converter With Linearity Calibration Using Dual Time Offset Arbiters in 65-nm CMOS

Author(s):  
Hayun Chung ◽  
Minji Hyun ◽  
Jungwon Kim
2012 ◽  
Vol 220-223 ◽  
pp. 2138-2143
Author(s):  
Jie Tao Diao ◽  
Qing Jiang Li ◽  
Peng Wang ◽  
Yi Nan Wang

The hardware structure and the data-processing flow of FPGA based Time to Digital Converter (TDC) are introduced firstly in the essay. Then, according to the issue of inaccuracy in arriving time of external triggers, a correction method is proposed to enhance the accuracy of starting time. In the end, by contrast experiment, it is shown that this correction method could improve the accuracy of starting time effectively. In addition, the minimum time resolution is 400ps, which makes the TDC be adequate for applications in the fields which require high-resolution time measurement, for example, in the application of time-of-flight mass spectrometer (TOF-MS).


1998 ◽  
Vol 33 (4) ◽  
pp. 650-656 ◽  
Author(s):  
P. Andreani ◽  
F. Bigongiari ◽  
R. Roncella ◽  
R. Saletti ◽  
P. Terreni ◽  
...  

2007 ◽  
Vol 463-465 ◽  
pp. 1088-1091 ◽  
Author(s):  
K. Nakamiya ◽  
T. Nishigai ◽  
N. Yoshikawa ◽  
A. Fujimaki ◽  
H. Terai ◽  
...  

2009 ◽  
Vol 56 (8) ◽  
pp. 1612-1621 ◽  
Author(s):  
V. Kratyuk ◽  
P.K. Hanumolu ◽  
K. Ok ◽  
Un-Ku Moon ◽  
K. Mayaram

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