High Gain 130-GHz Frequency Doubler With Colpitts Output Buffer Delivering P out up to 8 dBm with 6% PAE in 55-nm SiGe BiCMOS

2021 ◽  
Vol 4 ◽  
pp. 36-39
Author(s):  
Mahmoud M. Pirbazari ◽  
Andrea Mazzanti
2009 ◽  
Vol 19 (9) ◽  
pp. 572-574 ◽  
Author(s):  
A.Y.-K. Chen ◽  
Y. Baeyens ◽  
Young-Kai Chen ◽  
Jenshan Lin

2012 ◽  
Vol 241-244 ◽  
pp. 2215-2220
Author(s):  
Gao Wei Gu ◽  
En Zhu

A 10Gbit/s burst-mode transimpedance preamplifier is described. Regulated cascade (RGC) TIA core with variable gain, fast response peak detector, single-to-differential and output buffer are included, providing auto-gain-control and threshold extraction functions. The burst-mode preamplifier is implemented by 0.13µm CMOS technology, presents a high gain of 67.9dB with a 3-dB bandwidth of 6.92GHz and a low gain of 57.4dB with a 3-dB bandwidth of 8.60GHz with a settling time less than 20ns.


Author(s):  
Jiangtao Sun ◽  
Qing Liu ◽  
Yong-Ju Suh ◽  
Takayuki Shibata ◽  
Toshihiko Yoshimasu

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