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SoC Masters: an international MSc program in system-on-chip design at KTH
Proceedings 2001 International Conference on Microelectronic Systems Education
◽
10.1109/mse.2001.932416
◽
2005
◽
Cited By ~ 1
Author(s):
H. Tenhunen
◽
E. Dubrova
Keyword(s):
System On Chip
◽
Chip Design
◽
On Chip
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Cited By
References
Developing silicon intellectual property E-trade mechanisms for system on chip design and integration
International Journal of Computer Integrated Manufacturing
◽
10.1080/09511920601160122
◽
2007
◽
Vol 20
(5)
◽
pp. 423-435
◽
Cited By ~ 1
Author(s):
C. V. Trappey
◽
A. J. C. Trappey
◽
F. T. L. Lin
Keyword(s):
Intellectual Property
◽
System On Chip
◽
Chip Design
◽
On Chip
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Tutorial T4: Intellectual Property Protection and Security in System-on-Chip Design
2012 25th International Conference on VLSI Design
◽
10.1109/vlsid.2012.31
◽
2012
◽
Cited By ~ 1
Author(s):
Susmita Sur-Kolay
◽
S. Bhunia
Keyword(s):
Intellectual Property
◽
System On Chip
◽
Intellectual Property Protection
◽
Chip Design
◽
On Chip
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System Architecting and System-on-Chip Design of Intelligent Sensor Networks for Active Volcanoes
2008 2nd Annual IEEE Systems Conference
◽
10.1109/systems.2008.4519025
◽
2008
◽
Cited By ~ 2
Author(s):
Wai-Chi Fang
◽
Sharon Kedar
Keyword(s):
Sensor Networks
◽
System On Chip
◽
Chip Design
◽
Intelligent Sensor
◽
On Chip
◽
Intelligent Sensor Networks
◽
Active Volcanoes
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High Level System-on-Chip Design using UML and SystemC
Electronics, Robotics and Automotive Mechanics Conference (CERMA 2007)
◽
10.1109/cerma.2007.4367776
◽
2007
◽
Cited By ~ 1
Author(s):
Blanca Alicia Correa
◽
Juan Fernando Eusse
◽
Danny Munera
◽
Jose Edinson Aedo
◽
Juan Fernando Velez
Keyword(s):
System On Chip
◽
Level System
◽
Chip Design
◽
On Chip
◽
High Level
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IP development and management of IP DB enabling efficient system-on-chip design
AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)
◽
10.1109/apasic.1999.824070
◽
2003
◽
Cited By ~ 1
Author(s):
Young-ho Lee
◽
Ki-Won Kwon
◽
Jin-Tea Kim
◽
Chul-Dong Lee
Keyword(s):
System On Chip
◽
Chip Design
◽
Efficient System
◽
On Chip
◽
Development And Management
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Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis, and Validation
EDA for IC Implementation, Circuit Design, and Process Technology
◽
10.1201/9781420007954-23
◽
2018
◽
pp. 23_1-23_25
Author(s):
Nishath Verghese
◽
Makoto Nagata
Keyword(s):
System On Chip
◽
Chip Design
◽
Mixed Signal
◽
Signal Noise
◽
Noise Coupling
◽
Modeling Analysis
◽
On Chip
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A System on Chip Design Framework for Prime Number Validation Using Reconfigurable Hardware
Field Programmable Logic and Application - Lecture Notes in Computer Science
◽
10.1007/978-3-540-30117-2_173
◽
2004
◽
pp. 1186-1187
Author(s):
Ray C. C. Cheung
Keyword(s):
Prime Number
◽
Reconfigurable Hardware
◽
System On Chip
◽
Design Framework
◽
Chip Design
◽
On Chip
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Colif: A multilevel design representation for application-specific multiprocessor system-on-chip design
Proceedings 12th International Workshop on Rapid System Prototyping. RSP 2001
◽
10.1109/iwrsp.2001.933847
◽
2002
◽
Cited By ~ 6
Author(s):
W.O. Cesario
◽
G. Nicolescu
◽
L. Gauthier
◽
D. Lyonnard
◽
A.A. Jerraya
Keyword(s):
System On Chip
◽
Multiprocessor System
◽
Chip Design
◽
Design Representation
◽
On Chip
◽
Application Specific
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Programmable System Level Integration Brings System-on-Chip Design to the Desktop
Lecture Notes in Computer Science - Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing
◽
10.1007/3-540-44614-1_86
◽
2000
◽
pp. 789-792
Author(s):
Guy Lecurieux Lafayette
Keyword(s):
System On Chip
◽
System Level
◽
Chip Design
◽
On Chip
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H.264 codec system-on-chip design and verification
2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03
◽
10.1109/icasic.2003.1277361
◽
2003
◽
Cited By ~ 9
Author(s):
Qiang Peng
◽
Jin Jing
Keyword(s):
System On Chip
◽
Chip Design
◽
On Chip
Download Full-text
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