AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)
Latest Publications

TOTAL DOCUMENTS

104

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0780357051

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A 48-pin "minichip" implementation of baseband analog processor for the CDMA mobile phones

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824125 ◽

2003 ◽

Cited By ~ 1

Author(s):

Kyung-Suc Nah ◽

Tae-Won Ahn ◽

Seung-Beom Baik ◽

Jin-Sub Choi ◽

Woo-Seung Choo ◽

...

Keyword(s):

Mobile Phones ◽

Analog Processor

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Reusable design of run length coder for image compression application

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824082 ◽

2003 ◽

Cited By ~ 1

Author(s):

Seongmo Park ◽

Inhag Park ◽

Jinjong Cha ◽

Hanjin Cho

Keyword(s):

Image Compression ◽

Run Length ◽

Reusable Design

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Pattern generation for verification of VHDL behavioral-level design

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824096 ◽

2003 ◽

Author(s):

Jong-Hyeon Kim ◽

Seung-Kyu Park ◽

Young-Ho Seo ◽

Dong-Wook Kim

Keyword(s):

Pattern Generation ◽

Behavioral Level ◽

Level Design

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IP development and management of IP DB enabling efficient system-on-chip design

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824070 ◽

2003 ◽

Cited By ~ 1

Author(s):

Young-ho Lee ◽

Ki-Won Kwon ◽

Jin-Tea Kim ◽

Chul-Dong Lee

Keyword(s):

System On Chip ◽

Chip Design ◽

Efficient System ◽

On Chip ◽

Development And Management

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A filter for low EMI and low noise

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824013 ◽

2003 ◽

Author(s):

Young-Hwan Uun ◽

Ho-Jung Yoo ◽

Seog-Heon Ham ◽

Young-Jun Kim ◽

Yong-Hee Lee

Keyword(s):

Low Noise

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Implementation of a cycle-based simulator for the design of a processor core

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824040 ◽

2003 ◽

Author(s):

Moon Gyung Rim ◽

Byung In Moon ◽

Sang Jun An ◽

Dong Ryul Ryu ◽

Yong Surk Lee

Keyword(s):

Processor Core

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Design of 250 Mb/s 10-channel CMOS optical receiver array for computer communication

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824020 ◽

2003 ◽

Cited By ~ 1

Author(s):

Kwangoh Kim ◽

Jungryoul Choi ◽

Joongho Choi

Keyword(s):

Optical Receiver ◽

Computer Communication ◽

Receiver Array

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A 50% power reduction scheme for CMOS relaxation oscillator

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824051 ◽

2003 ◽

Cited By ~ 16

Author(s):

ByungJoon Song ◽

Hwicheol Kim ◽

Youngdon Choi ◽

Wonchan Kim

Keyword(s):

Relaxation Oscillator ◽

Power Reduction ◽

Reduction Scheme

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A dual issue queued pipelined Java processor TRAJA-toward an open source processor project

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824066 ◽

2003 ◽

Cited By ~ 1

Author(s):

N. Shimizu ◽

M. Naito

Keyword(s):

Open Source ◽

Java Processor

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New scan design of asynchronous sequential circuits

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824102 ◽

2003 ◽

Cited By ~ 6

Author(s):

Yong-Seok Kang ◽

Kyung-Hoi Huh ◽

Sungho Kang

Keyword(s):

Sequential Circuits ◽

Scan Design

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AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A 48-pin "minichip" implementation of baseband analog processor for the CDMA mobile phones

Reusable design of run length coder for image compression application

Pattern generation for verification of VHDL behavioral-level design

IP development and management of IP DB enabling efficient system-on-chip design

A filter for low EMI and low noise

Implementation of a cycle-based simulator for the design of a processor core

Design of 250 Mb/s 10-channel CMOS optical receiver array for computer communication

A 50% power reduction scheme for CMOS relaxation oscillator

A dual issue queued pipelined Java processor TRAJA-toward an open source processor project

New scan design of asynchronous sequential circuits

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)
Latest Publications