Implementation of a parallel processing system for inference of phylogenetic trees

Author(s):  
H. Matsuda ◽  
G.J. Olsen ◽  
R. Hagstrom ◽  
R. Overbeek ◽  
Y. Kaneda
1992 ◽  
Author(s):  
Peter E. Undrill ◽  
George G. Cameron ◽  
M. J. Cookson ◽  
Chris Davies ◽  
Neil L. Robinson ◽  
...  

2005 ◽  
Author(s):  
ZongTao Duan ◽  
XingShe Zhou

2021 ◽  
Vol 17 (11) ◽  
pp. 155014772110331
Author(s):  
Jung-hyun Seo ◽  
HyeongOk Lee

One method to create a high-performance computer is to use parallel processing to connect multiple computers. The structure of the parallel processing system is represented as an interconnection network. Traditionally, the communication links that connect the nodes in the interconnection network use electricity. With the advent of optical communication, however, optical transpose interconnection system networks have emerged, which combine the advantages of electronic communication and optical communication. Optical transpose interconnection system networks use electronic communication for relatively short distances and optical communication for long distances. Regardless of whether the interconnection network uses electronic communication or optical communication, network cost is an important factor among the various measures used for the evaluation of networks. In this article, we first propose a novel optical transpose interconnection system–Petersen-star network with a small network cost and analyze its basic topological properties. Optical transpose interconnection system–Petersen-star network is an undirected graph where the factor graph is Petersen-star network. OTIS–PSN n has the number of nodes 102n, degree n+3, and diameter 6 n − 1. Second, we compare the network cost between optical transpose interconnection system–Petersen-star network and other optical transpose interconnection system networks. Finally, we propose a routing algorithm with a time complexity of 6 n − 1 and a one-to-all broadcasting algorithm with a time complexity of 2 n − 1.


Author(s):  
Anjaneya R. Chagam ◽  
Partha Dasgupta ◽  
Rajkumar Khandelwal ◽  
Shashi P. Reddy ◽  
Shantanu Sardesai

2013 ◽  
Vol 284-287 ◽  
pp. 2396-2401 ◽  
Author(s):  
Chiu Keng Lai ◽  
Kun Lin Ho

It is known that the flexibility and programmable abilities have made the FPGA widely used as controllers to the electrical machines and systems. Above all, the high density of recent developed chip results in many of the CPU cores and complicated hardware can be programmed into the chip to be as controller. Thus, this topic is based on the currently available technologies of FPGA-based system design to the parallel processing. Software and hardware co-design are shown to reach the performance, and the system’s software stream data are processed with the hardware parallel technique. This analysis enables FPGA-based control system on the parallel computing platform to achieve the simultaneous operation for 3-axis motor motion and drive system control. In that way, we chose the high density FPGA, Altera Cyclone II EP2C8Q208C8N, as the chip to develop the hardware of microprocessor, motor drive and motion controller. The developed system was practically applied to a 3-axis motion platform driven by stepping motors to evaluate the system performance.


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