Electronic products and systems are widely used in industrial network systems, control devices, and data acquisition devices across many industry sectors. Failures of such electronic systems might lead to unexpected downtime, loss of productivity, additional work for repairs, and delay in product and service development. Thus, developing an appropriate sensing technique is necessary, because it is the first step in system fault diagnosis and prognosis. Many sensing techniques often require external and additional sensing devices, which might disturb system operation and consequently increase operating costs. In this study, we present an on-chip health sensing method for non-destructive and non-invasive interconnect degradation detection. Bit error rate (BER), which represents data integrity during digital signal transmission, was selected to sense interconnect health without connecting external sensing devices. To verify the health sensing performance, corrosion tests were conducted with in situ monitoring of the BER and direct current (DC) resistance. The eye size, extracted from the BER measurement, showed the highest separation between the intact and failed interconnect, as well as a gradual transition, compared with abrupt changes in the DC resistance, during interconnect degradation. These experimental results demonstrate the potential of the proposed sensing method for on-chip interconnect health monitoring applications without disturbing system operation.
Research and analysis based on transformer DC resistance measurement data
