System-Level Design of a 64-Channel Low Power Neural Spike Recording Sensor

Manuel Delgado-Restituto; Alberto Rodriguez-Perez; Angela Darie; Cristina Soto-Sanchez; Eduardo Fernandez-Jover; Angel Rodriguez-Vazquez

doi:10.1109/tbcas.2016.2618319

System-Level Design of a 64-Channel Low Power Neural Spike Recording Sensor

IEEE Transactions on Biomedical Circuits and Systems ◽

10.1109/tbcas.2016.2618319 ◽

2017 ◽

Vol 11 (2) ◽

pp. 420-433 ◽

Cited By ~ 11

Author(s):

Manuel Delgado-Restituto ◽

Alberto Rodriguez-Perez ◽

Angela Darie ◽

Cristina Soto-Sanchez ◽

Eduardo Fernandez-Jover ◽

...

Keyword(s):

Low Power ◽

System Level ◽

System Level Design ◽

Neural Spike ◽

Level Design

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A system-level design method for RF receiver front-end with low power consumption

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-021-01879-y ◽

2021 ◽

Author(s):

Ziba Fazel ◽

Mojtaba Atarodi ◽

Sirus Sadughi

Keyword(s):

Power Consumption ◽

Low Power ◽

Design Method ◽

System Level ◽

Low Power Consumption ◽

System Level Design ◽

Rf Receiver ◽

Front End ◽

Level Design

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Low-power system-level design of VLSI packet switching fabrics

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.924826 ◽

2001 ◽

Vol 20 (6) ◽

pp. 723-738 ◽

Cited By ~ 26

Author(s):

A.G. Wassal ◽

M.A. Hasan

Keyword(s):

Power System ◽

Low Power ◽

Packet Switching ◽

System Level ◽

System Level Design ◽

Low Power System ◽

Level Design ◽

Switching Fabrics

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System-level design optimization of reliable and low power multiprocessor system-on-chip

Microelectronics Reliability ◽

10.1016/j.microrel.2012.03.002 ◽

2012 ◽

Vol 52 (8) ◽

pp. 1735-1748 ◽

Cited By ~ 4

Author(s):

Rishad A. Shafik ◽

Bashir M. Al-Hashimi ◽

Jeff S. Reeve

Keyword(s):

Low Power ◽

Design Optimization ◽

System On Chip ◽

System Level ◽

Multiprocessor System ◽

System Level Design ◽

Level Design ◽

On Chip

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Recent Advances in Low-Power Design and Functional Coverification Automation from the Earliest System-Level Design Stages

Low-Power Electronics Design ◽

10.1201/9781420039559-46 ◽

2018 ◽

pp. 665-688

Keyword(s):

Low Power ◽

Low Power Design ◽

System Level ◽

System Level Design ◽

Recent Advances ◽

Level Design

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Low-Power Neuromorphic Hardware for Signal Processing Applications: A Review of Architectural and System-Level Design Approaches

IEEE Signal Processing Magazine ◽

10.1109/msp.2019.2933719 ◽

2019 ◽

Vol 36 (6) ◽

pp. 97-110 ◽

Cited By ~ 6

Author(s):

Bipin Rajendran ◽

Abu Sebastian ◽

Michael Schmuker ◽

Narayan Srinivasa ◽

Evangelos Eleftheriou

Keyword(s):

Signal Processing ◽

Low Power ◽

System Level ◽

System Level Design ◽

Neuromorphic Hardware ◽

Level Design

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Issues for low-power CAD tools: A system-level design study

Design Automation for Embedded Systems ◽

10.1007/bf00209908 ◽

1996 ◽

Vol 1 (4) ◽

Cited By ~ 4

Author(s):

Andrew Wolfe

Keyword(s):

Low Power ◽

System Level ◽

System Level Design ◽

Design Study ◽

Cad Tools ◽

Level Design

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System Level Design of Low Rate, Low Power 3.1-5GHz IEEE 802.15.4a UWB Transceiver for Medical Monitoring Applications

International Journal of Electronics and Electrical Engineering ◽

10.12720/ijeee.2.3.222-228 ◽

2014 ◽

pp. 222-228

Author(s):

Imen Barraj ◽

Hatem Trabelsi ◽

Mohamed Masmoudi

Keyword(s):

Low Power ◽

System Level ◽

Medical Monitoring ◽

System Level Design ◽

Monitoring Applications ◽

Ieee 802.15.4A ◽

Level Design ◽

Low Rate

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Recent Advances in Low-Power Design and Functional Coverification Automation from the Earliest System-Level Design Stages

Low-Power Processors and Systems on Chips ◽

10.1201/9781315220581-20 ◽

2018 ◽

pp. 20-1-20-24

Author(s):

Thierry J.-F. Omnés ◽

Youcef Bouchebaba ◽

Chidamber Kulkarni ◽

Fabien Coelho

Keyword(s):

Low Power ◽

Low Power Design ◽

System Level ◽

System Level Design ◽

Recent Advances ◽

Level Design

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Complexity and Low Power Issues for On-chip Interconnections in MPSoC System Level Design

IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06) ◽

10.1109/isvlsi.2006.30 ◽

2006 ◽

Cited By ~ 3

Author(s):

Y. Sheynin ◽

E. Suvorova ◽

F. Shutenko

Keyword(s):

Low Power ◽

System Level ◽

System Level Design ◽

Level Design ◽

On Chip

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A case study in low-power system-level design

Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors ◽

10.1109/iccd.1995.528830 ◽

2002 ◽

Cited By ~ 2

Author(s):

A. Wolfe

Keyword(s):

Power System ◽

Low Power ◽

System Level ◽

System Level Design ◽

Low Power System ◽

Level Design

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