A system-level design method for RF receiver front-end with low power consumption

2021 ◽  
Author(s):  
Ziba Fazel ◽  
Mojtaba Atarodi ◽  
Sirus Sadughi
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Design Method ◽  
System Level ◽  
Low Power Consumption ◽  
System Level Design ◽  
Rf Receiver ◽  
Front End ◽  
Level Design

MPSoC System Level Design Method Based on Universal Interconnect Network

2010 ◽  
Vol 22 (5) ◽  
pp. 858-864
Author(s):  
Yuanshen Li ◽  
Yun Pan ◽  
Yong Ding ◽  
Xiaolang Yan
Keyword(s):  
Design Method ◽  
System Level ◽  
System Level Design ◽  
Level Design ◽  
Interconnect Network

scholarly journals System Level Design of RF Receivers Based on Non Linear Optimization and Power Consumption Models

2019 ◽  
Vol 27 (1) ◽  
pp. 347-356
Author(s):  
L. H. A. Lolis ◽  
P. N. Stroski ◽  
E. G. Lima
Keyword(s):  
Power Consumption ◽  
Linear Optimization ◽  
System Level ◽  
System Level Design ◽  
Rf Receivers ◽  
Non Linear ◽  
Level Design

System-level design optimization of reliable and low power multiprocessor system-on-chip

2012 ◽  
Vol 52 (8) ◽  
pp. 1735-1748 ◽  
Author(s):  
Rishad A. Shafik ◽  
Bashir M. Al-Hashimi ◽  
Jeff S. Reeve
Keyword(s):  
Low Power ◽  
Design Optimization ◽  
System On Chip ◽  
System Level ◽  
Multiprocessor System ◽  
System Level Design ◽  
Level Design ◽  
On Chip

scholarly journals Low-Power Neuromorphic Hardware for Signal Processing Applications: A Review of Architectural and System-Level Design Approaches

2019 ◽  
Vol 36 (6) ◽  
pp. 97-110 ◽  
Author(s):  
Bipin Rajendran ◽  
Abu Sebastian ◽  
Michael Schmuker ◽  
Narayan Srinivasa ◽  
Evangelos Eleftheriou
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
System Level ◽  
System Level Design ◽  
Neuromorphic Hardware ◽  
Level Design
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