All-Optical Wavelength-Routed Architecture for a Power-Efficient Network on Chip

IEEE Transactions on Computers ◽

10.1109/tc.2012.171 ◽

2014 ◽

Vol 63 (3) ◽

pp. 777-792 ◽

Keyword(s):

Network On Chip ◽

Power Efficient ◽

Optical Wavelength ◽

All Optical ◽

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Power efficient photonic network-on-chip for a scalable GPU

Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip - NOCS '19 ◽

10.1145/3313231.3352370 ◽

2019 ◽

Author(s):

Janibul Bashir ◽

Khushal Sethi ◽

Smruti R. Sarangi

Keyword(s):

Network On Chip ◽

Power Efficient ◽

Photonic Network ◽

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Reconfigurable Adaptive Routing Buffer Design for Scalable Power Efficient Network On Chip

Indian Journal of Science and Technology ◽

10.17485/ijst/2015/v8i12/59145 ◽

2015 ◽

Vol 8 (12) ◽

Author(s):

G. Selvaraj ◽

K. R. Kashwan

Keyword(s):

Adaptive Routing ◽

Network On Chip ◽

Power Efficient ◽

Buffer Design ◽

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Exploration of a scalable and power-efficient asynchronous Network-on-Chip with dynamic resource allocation

Microprocessors and Microsystems ◽

10.1016/j.micpro.2018.05.003 ◽

2018 ◽

Vol 60 ◽

pp. 173-184

Author(s):

Charles Effiong ◽

Gilles Sassatelli ◽

Abdoulaye Gamatie

Keyword(s):

Resource Allocation ◽

Network On Chip ◽

Dynamic Resource Allocation ◽

Power Efficient ◽

Asynchronous Network ◽

Dynamic Resource ◽

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An Innovative Power-Efficient Architecture for Input Buffer of Network on Chip

2007 IEEE International Conference on Integration Technology ◽

10.1109/icitechnology.2007.4290470 ◽

2007 ◽

Author(s):

Kun Huang ◽

Jun Wang ◽

Ge Zhang

Keyword(s):

Network On Chip ◽

Input Buffer ◽

Power Efficient ◽

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A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing

Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems - ASPLOS '10 ◽

10.1145/1736020.1736024 ◽

2010 ◽

Author(s):

Nevin Kirman ◽

José F. Martínez

Keyword(s):

Power Efficient ◽

All Optical ◽

Oblivious Routing ◽

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QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers

2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca.2014.6835942 ◽

2014 ◽

Author(s):

Dominic DiTomaso ◽

Avinash Kodi ◽

Ahmed Louri

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

Power Efficient ◽

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Memory-centric network-on-chip for power efficient execution of task-level pipeline on a multi-core processor

IET Computers & Digital Techniques ◽

10.1049/iet-cdt.2008.0085 ◽

2009 ◽

Vol 3 (5) ◽

pp. 513 ◽

Author(s):

D. Kim ◽

K. Kim ◽

J.-Y. Kim ◽

S. Lee ◽

H.-J. Yoo

Keyword(s):

Network On Chip ◽

Power Efficient ◽

On Chip ◽

Multi Core Processor ◽

Efficient Execution

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Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures

IEEE Transactions on Computers ◽

10.1109/tc.2015.2401013 ◽

2015 ◽

Vol 64 (12) ◽

pp. 3555-3568 ◽

Author(s):

Dominic DiTomaso ◽

Avinash Karanth Kodi ◽

Ahmed Louri ◽

Razvan Bunescu

Keyword(s):

Network On Chip ◽

Power Efficient ◽

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A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing

ACM SIGPLAN Notices ◽

10.1145/1735971.1736024 ◽

2010 ◽

Vol 45 (3) ◽

pp. 15-28 ◽

Author(s):

Nevin Kirman ◽

José F. Martínez

Keyword(s):

Power Efficient ◽

All Optical ◽

Oblivious Routing ◽

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200mm wafer scale III-V/SOI technology for all-optical network-on-chip and signal processing

7th IEEE International Conference on Group IV Photonics ◽

10.1109/group4.2010.5643444 ◽

2010 ◽

Author(s):

Liu Liu ◽

Thijs Spuesens ◽

Dries Van Thourhout ◽

Geert Morthier ◽

Laurent Grenouillet ◽

...

Keyword(s):

Signal Processing ◽

Optical Network ◽

Network On Chip ◽

Wafer Scale ◽

All Optical ◽

On Chip ◽

Soi Technology ◽

All Optical Network

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