Power efficient photonic network-on-chip for a scalable GPU

Author(s):  
Janibul Bashir ◽  
Khushal Sethi ◽  
Smruti R. Sarangi
Author(s):  
Soumyajit Poddar ◽  
Prasun Ghosal ◽  
Priyajit Mukherjee ◽  
Suman Samui ◽  
Hafizur Rahaman

2011 ◽  
Author(s):  
Aleksandr Biberman ◽  
Nicolás Sherwood-Droz ◽  
Xiaoliang Zhu ◽  
Kyle Preston ◽  
Gilbert Hendry ◽  
...  

Nanophotonics ◽  
2018 ◽  
Vol 7 (5) ◽  
pp. 827-835 ◽  
Author(s):  
Hao Jia ◽  
Ting Zhou ◽  
Yunchou Zhao ◽  
Yuhao Xia ◽  
Jincheng Dai ◽  
...  

AbstractPhotonic network-on-chip for high-performance multi-core processors has attracted substantial interest in recent years as it offers a systematic method to meet the demand of large bandwidth, low latency and low power dissipation. In this paper we demonstrate a non-blocking six-port optical switch for cluster-mesh photonic network-on-chip. The architecture is constructed by substituting three optical switching units of typical Spanke-Benes network to optical waveguide crossings. Compared with Spanke-Benes network, the number of optical switching units is reduced by 20%, while the connectivity of routing path is maintained. By this way the footprint and power consumption can be reduced at the expense of sacrificing the network latency performance in some cases. The device is realized by 12 thermally tuned silicon Mach-Zehnder optical switching units. Its theoretical spectral responses are evaluated by establishing a numerical model. The experimental spectral responses are also characterized, which indicates that the optical signal-to-noise ratios of the optical switch are larger than 13.5 dB in the wavelength range from 1525 nm to 1565 nm. Data transmission experiment with the data rate of 32 Gbps is implemented for each optical link.


Author(s):  
Keren Bergman ◽  
Luca P. Carloni ◽  
Aleksandr Biberman ◽  
Johnnie Chan ◽  
Gilbert Hendry

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