Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies

Negative feedback applied to the back gate of MOS devices available in FD-SOI (fully depleted silicon on insulator) CMOS technologies can be used to improve the linearity of operational amplifiers. Two operational amplifiers designed and fabricated in a 22 nm FD-SOI technology illustrate this technique, as well as its advantages and limitations.

Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies

Negative feedback to the back gate of MOS devices available in FD-SOI technologies can be used to improve linearity of operational amplifiers. Two operational amplifiers designed and fabricated in a 22nm FD-SOI technology illustrate this technique, its advantages and limitations.

Compact and Low-Power Under-Voltage Lockout and Thermal-Shutdown Protection Circuits Using a Novel Low-IQ All-in-One Bandgap Comparator

This paper presents a novel and compact bandgap comparator (BGRCOMP) for under-voltage lockout (UVLO) and thermal shutdown (TSD) protection circuits. The proposed BGRCOMP is self-referenced and combines the advantages of both a high-accuracy bandgap reference and a comparator into one single circuit. A latch-controlled biasing technique is also presented, which reduces static power consumption of the proposed BGRCOMP. The proposed BGRCOMP is used for the design of compact and low power UVLO and TSD circuits. The post-layout simulation results using a 0.18 µm BCD-on-SOI technology prove the attractive performance of the UVLO and TSD with a static current (I_Q) of 7.76 µA and 5.4 µA from a 5 V supply, respectively. The deviations of UVLO thresholds are less than 3 mV in the temperature range of -40~85 °C.

Compact and Low-Power Under-Voltage Lockout and Thermal-Shutdown Protection Circuits Using a Novel Low-IQ All-in-One Bandgap Comparator

This paper presents a novel and compact bandgap comparator (BGRCOMP) for under-voltage lockout (UVLO) and thermal shutdown (TSD) protection circuits. The proposed BGRCOMP is self-referenced and combines the advantages of both a high-accuracy bandgap reference and a comparator into one single circuit. A latch-controlled biasing technique is also presented, which reduces static power consumption of the proposed BGRCOMP. The proposed BGRCOMP is used for the design of compact and low power UVLO and TSD circuits. The post-layout simulation results using a 0.18 µm BCD-on-SOI technology prove the attractive performance of the UVLO and TSD with a static current (I_Q) of 7.76 µA and 5.4 µA from a 5 V supply, respectively. The deviations of UVLO thresholds are less than 3 mV in the temperature range of -40~85 °C.