On Hamming Product Codes With Type-II Hybrid ARQ for On-Chip Interconnects

2009 ◽  
Vol 56 (9) ◽  
pp. 2042-2054 ◽  
Author(s):  
Bo Fu ◽  
P. Ampadu
Keyword(s):  
Type Ii ◽  
VLSI Design ◽  
2008 ◽  
Vol 2008 ◽  
pp. 1-14 ◽  
Author(s):  
Bo Fu ◽  
Paul Ampadu

We propose an energy-efficient error control scheme for on-chip interconnects capable of correcting a combination of multiple random and burst errors. The iterative decoding method, interleaver, using two-dimensional Hamming product codes and a simplified type-II hybrid ARQ, achieves several orders of magnitude improvement in residual flit-error rate for multiwire errors and up to 45% improvement in throughput in high noise environments. For a given system reliability requirement, the proposed error control scheme yields up to 50% energy improvement over other error correction schemes. The low overhead of our approach makes it suitable for implementation in on-chip interconnect switches.


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