Measurement of Single-Event Upsets in 65-nm SRAMs Under Irradiation of Spallation Neutrons at J-PARC MLF

Author(s):  
Junya Kuroda ◽  
Yasuhiro Miyake ◽  
Seiya Manabe ◽  
Yukinobu Watanabe ◽  
Kojiro Ito ◽  
...  
2005 ◽  
Vol 52 (6) ◽  
pp. 2319-2325 ◽  
Author(s):  
J. Baggio ◽  
V. Ferlet-Cavrois ◽  
D. Lambert ◽  
P. Paillet ◽  
F. Wrobel ◽  
...  

1994 ◽  
Vol 41 (6) ◽  
pp. 2244-2251 ◽  
Author(s):  
D.J. Fouts ◽  
T. Weatherford ◽  
D. McMorrow ◽  
J.S. Melinger ◽  
A.B. Campbell

2021 ◽  
Vol 104 (7) ◽  
pp. 13-34
Author(s):  
Ani Khachatrian ◽  
Adrian Ildefonso ◽  
Zahabul Islam ◽  
Md Abu Jafar Rasel ◽  
Amanul Haque ◽  
...  

2017 ◽  
Vol 64 (10) ◽  
pp. 2648-2660 ◽  
Author(s):  
Avraham Akkerman ◽  
Joseph Barak ◽  
Nir M. Yitzhak

2021 ◽  
Author(s):  
Sheldon Mark Foulds

Over the last few years evolution in electronics technology has led to the shrinkage of electronic circuits. While this has led to the emergence of more powerful computing systems it has also caused a dramatic increase in the occurrence of soft errors and a steady climb in failure in time (FIT) rates. This problem is most prevalent in FPGA based systems which are highly susceptible to radiation induced errors. Depending upon the severity of the problem a number of methods exist to counter these effects including Triple Modular Redundancy (TMR), Error Control Coding (ECC), scrubbing systems etc. The following project presents a simulation of an FPGA based system that employs one of the popular error control code techniques called the Hamming Code. A resulting analysis shows that Hamming Code is able to mitigate the effects of single event upsets (SEUs) but suffers due to a number of limitations.


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