Timing Variability-Aware Analysis and Optimization for Variable-Latency Designs

Author(s):  
Ning-Chi Huang ◽  
Chao-Wei Cheng ◽  
Kai-Chiang Wu
SLEEP ◽  
2021 ◽  
Vol 44 (Supplement_2) ◽  
pp. A86-A86
Author(s):  
Michael Grandner ◽  
Naghmeh Rezaei

Abstract Introduction The COVID-19 pandemic has resulted in societal-level changes to sleep and other behavioral patterns. Objective, longitudinal data would allow for a greater understanding of sleep-related changes at the population level. Methods N= 163,524 deidentified active Fitbit users from 6 major US cities contributed data, representing areas particularly hard-hit by the pandemic (Chicago, Houston, Los Angeles, New York, San Francisco, and Miami). Sleep variables extracted include nightly and weekly mean sleep duration and bedtime, variability (standard deviation) of sleep duration and bedtime, and estimated arousals and sleep stages. Deviation from similar timeframes in 2019 were examined. All analyses were performed in Python. Results These data detail how sleep duration and timing changed longitudinally, stratified by age group and gender, relative to previous years’ data. Overall, 2020 represented a significant departure for all age groups and both men and women (P<0.00001). Mean sleep duration increased in nearly all groups (P<0.00001) by 5-11 minutes, compared to a mean decrease of 5-8 minutes seen over the same period in 2019. Categorically, sleep duration increased for some and decreased for others, but more extended than restricted. Sleep phase shifted later for nearly all groups (p<0.00001). Categorically, bedtime was delayed for some and advanced for others, though more delayed than advanced. Duration and bedtime variability decreased, owing largely to decreased weekday-weekend differences. WASO increased, REM% increased, and Deep% decreased. Additional analyses show stratified, longitudinal changes to sleep duration and timing mean and variability distributions by month, as well as effect sizes and correlations to other outcomes. Conclusion The pandemic was associated with increased sleep duration on average, in contrast to 2019 when sleep decreased. The increase was most profound among younger adults, especially women. The youngest adults also experienced the greatest bedtime delay, in line with extensive school-start-times and chronotype data. When given the opportunity, the difference between weekdays and weekends became smaller, with occupational implications. Sleep staging data showed that slightly extending sleep minimally impacted deep sleep but resulted in a proportional increase in REM. Wakefulness during the night also increased, suggesting increased arousal despite greater sleep duration. Support (if any) This research was supported by Fitbit, Inc.


2018 ◽  
Vol 84 (2) ◽  
pp. 343-351
Author(s):  
Junkai Yang ◽  
Feiyi Ouyang ◽  
Linus Holm ◽  
Yingyu Huang ◽  
Lingyu Gan ◽  
...  
Keyword(s):  

SLEEP ◽  
2019 ◽  
Vol 42 (Supplement_1) ◽  
pp. A4-A5
Author(s):  
Andrew JK Phillips ◽  
Francis Cheong

2022 ◽  
Vol 15 (1) ◽  
pp. 1-32
Author(s):  
Lana Josipović ◽  
Shabnam Sheikhha ◽  
Andrea Guerrieri ◽  
Paolo Ienne ◽  
Jordi Cortadella

Commercial high-level synthesis tools typically produce statically scheduled circuits. Yet, effective C-to-circuit conversion of arbitrary software applications calls for dataflow circuits, as they can handle efficiently variable latencies (e.g., caches), unpredictable memory dependencies, and irregular control flow. Dataflow circuits exhibit an unconventional property: registers (usually referred to as “buffers”) can be placed anywhere in the circuit without changing its semantics, in strong contrast to what happens in traditional datapaths. Yet, although functionally irrelevant, this placement has a significant impact on the circuit’s timing and throughput. In this work, we show how to strategically place buffers into a dataflow circuit to optimize its performance. Our approach extracts a set of choice-free critical loops from arbitrary dataflow circuits and relies on the theory of marked graphs to optimize the buffer placement and sizing. Our performance optimization model supports important high-level synthesis features such as pipelined computational units, units with variable latency and throughput, and if-conversion. We demonstrate the performance benefits of our approach on a set of dataflow circuits obtained from imperative code.


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