Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
Latest Publications

TOTAL DOCUMENTS

338

(FIVE YEARS 0)

H-INDEX

17

(FIVE YEARS 0)

Published By IEEE

9783981537086

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Efficient neural network acceleration on GPGPU using content addressable memory

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927141 ◽

2017 ◽

Author(s):

Mohsen Imani ◽

Daniel Peroni ◽

Yeseong Kim ◽

Abbas Rahimi ◽

Tajana Rosing

Keyword(s):

Neural Network ◽

Content Addressable Memory

Download Full-text

Wave pipelining for majority-based beyond-CMOS technologies

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927195 ◽

2017 ◽

Author(s):

O. Zografos ◽

A. De Meester ◽

E. Testa ◽

M. Soeken ◽

P.-E. Gaillardon ◽

...

Keyword(s):

Wave Pipelining ◽

Download Full-text

Analysis of short-circuit conditions in logic circuits

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927102 ◽

2017 ◽

Author(s):

Joao Afonso ◽

Jose Monteiro

Keyword(s):

Short Circuit ◽

Download Full-text

Synthesis of activation-parallel convolution structures for neuromorphic architectures

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927265 ◽

2017 ◽

Author(s):

Seban Kim ◽

Jaeyong Chung

Download Full-text

Efficient synchronization methods for LET-based applications on a Multi-Processor System on Chip

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927271 ◽

2017 ◽

Author(s):

Gabriela Breaban ◽

Sander Stuijk ◽

Kees Goossens

Keyword(s):

System On Chip ◽

Download Full-text

A Mechanism for energy-efficient reuse of decoding and scheduling of x86 instruction streams

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927223 ◽

2017 ◽

Author(s):

Marcelo Brandalero ◽

Antonio Carlos S. Beck

Keyword(s):

Energy Efficient

Download Full-text

Continuous learning of HPC infrastructure models using big data analytics and in-memory processing tools

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927143 ◽

2017 ◽

Author(s):

Francesco Beneventi ◽

Andrea Bartolini ◽

Carlo Cavazzoni ◽

Luca Benini

Keyword(s):

Big Data ◽

Data Analytics ◽

Big Data Analytics ◽

Continuous Learning ◽

Memory Processing

Download Full-text

Simulation-based design procedure for sub 1V CMOS current reference

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927261 ◽

2017 ◽

Author(s):

Dmitry Osipov ◽

Steffen Paul

Keyword(s):

Design Procedure ◽

Current Reference ◽

Simulation Based Design ◽

Simulation Based

Download Full-text

MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927151 ◽

2017 ◽

Author(s):

Di Chen ◽

Hai Jin ◽

Xiaofei Liao ◽

Haikun Liu ◽

Rentong Guo ◽

...

Keyword(s):

Memory Systems ◽

Cache Replacement ◽

Download Full-text

Understanding the impact of precision quantization on the accuracy and energy of neural networks

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927224 ◽

2017 ◽

Author(s):

Soheil Hashemi ◽

Nicholas Anthony ◽

Hokchhay Tann ◽

R. Iris Bahar ◽

Sherief Reda

Keyword(s):

Neural Networks ◽

Download Full-text