An Efficient Modified Distributed Arithmetic Architecture Suitable for FIR Filter

2021 Sixth International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET) ◽

10.1109/wispnet51692.2021.9419365 ◽

2021 ◽

Author(s):

Narendiran S. ◽

Jayakumar E. P.

Keyword(s):

Distributed Arithmetic

Download Full-text

Design of 4:2 Compressor for Parallel Distributed Arithmetic FIR Filter

SSRN Electronic Journal ◽

10.2139/ssrn.3531562 ◽

2020 ◽

Author(s):

Priyadharsini Sarath ◽

Gnanamurugan Selvan

Keyword(s):

Distributed Arithmetic

Download Full-text

Design of digital FIR filter using dynamic distributed arithmetic algorithm with improved table look up scheme for residue number system

IET-UK International Conference on Information and Communication Technology in Electrical Sciences (ICTES 2007) ◽

10.1049/ic:20070683 ◽

2007 ◽

Author(s):

T. Vigneswaran ◽

J. Selva Kumar ◽

P. Subbarami Reddy

Keyword(s):

Number System ◽

Residue Number System ◽

Distributed Arithmetic ◽

Residue Number ◽

Arithmetic Algorithm

Download Full-text

Low power FIR filter implementation on FPGA using parallel Distributed Arithmetic

2015 Annual IEEE India Conference (INDICON) ◽

10.1109/indicon.2015.7443314 ◽

2015 ◽

Author(s):

Shaheen Khan ◽

Zainul Abdin Jaffery

Keyword(s):

Low Power ◽

Distributed Arithmetic

Download Full-text

Implementation of High Speed Pipelined Distributed Arithmetic Based FIR Filter

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.11.2247 ◽

2015 ◽

Vol 11 (12) ◽

pp. 1404-1409 ◽

Author(s):

P.L. Joseph Raj ◽

T. Vigneswaran

Keyword(s):

Distributed Arithmetic

Download Full-text

Low power area efficient adaptive FIR filter for hearing aids using distributed arithmetic architecture

International Journal of Speech Technology ◽

10.1007/s10772-020-09686-y ◽

2020 ◽

Vol 23 (2) ◽

pp. 287-296 ◽

Author(s):

P. V. Praveen Sundar ◽

D. Ranjith ◽

T. Karthikeyan ◽

V. Vinoth Kumar ◽

Balajee Jeyakumar

Keyword(s):

Low Power ◽

Hearing Aids ◽

Distributed Arithmetic ◽

Adaptive Fir ◽

Download Full-text

Realization of FIR Filter Using Modified Distributed Arithmetic Architecture

Signal & Image Processing An International Journal ◽

10.5121/sipij.2012.3108 ◽

2012 ◽

Vol 3 (1) ◽

pp. 83-94 ◽

Author(s):

Ramesh R

Keyword(s):

Distributed Arithmetic

Download Full-text

Design and implementation of Least Mean Square adaptive FIR filter using offset binary coding based Distributed Arithmetic

Microprocessors and Microsystems ◽

10.1016/j.micpro.2019.102884 ◽

2019 ◽

Vol 71 ◽

pp. 102884

Author(s):

D. Kalaiyarasi ◽

T. Kalpalatha Reddy

Keyword(s):

Mean Square ◽

Least Mean Square ◽

Distributed Arithmetic ◽

Design And Implementation ◽

Binary Coding ◽

Download Full-text

Reconfigurable FIR filter using distributed arithmetic on FPGAs

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) ◽

10.1109/iscas.2013.6572277 ◽

2013 ◽

Author(s):

Martin Kumm ◽

Konrad Moller ◽

Peter Zipf

Keyword(s):

Distributed Arithmetic

Download Full-text

Design analysis of a distributed arithmetic adaptive FIR filter on an FPGA

The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003 ◽

10.1109/acssc.2003.1292050 ◽

2004 ◽

Author(s):

W. Huang ◽

V. Krishnan ◽

D. Allred ◽

Heejong Yoo

Keyword(s):

Design Analysis ◽

Distributed Arithmetic ◽

Download Full-text

A low power FIR filter structure based on a modified distributed arithmetic algorithm

2013 International Conference on Anti-Counterfeiting, Security and Identification (ASID) ◽

10.1109/icasid.2013.6825308 ◽

2013 ◽

Author(s):

Lianfang Zhou ◽

Yinshui Xia ◽

Shiheng Wang

Keyword(s):

Low Power ◽

Distributed Arithmetic ◽

Filter Structure ◽

Arithmetic Algorithm

Download Full-text