Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory

2012 ◽  
Vol 51 (2) ◽  
pp. 02BM06 ◽  
Author(s):  
Shoun Matsunaga ◽  
Akira Katsumata ◽  
Masanori Natsui ◽  
Tetsuo Endoh ◽  
Hideo Ohno ◽  
...  
Keyword(s):  
Tunnel Junction ◽  
Magnetic Tunnel Junction ◽  
Low Energy ◽  
Content Addressable Memory ◽  
Ternary Content Addressable Memory

Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory

2012 ◽  
Vol 51 (2S) ◽  
pp. 02BM06 ◽  
Author(s):  
Shoun Matsunaga ◽  
Akira Katsumata ◽  
Masanori Natsui ◽  
Tetsuo Endoh ◽  
Hideo Ohno ◽  
...  
Keyword(s):  
Tunnel Junction ◽  
Magnetic Tunnel Junction ◽  
Low Energy ◽  
Content Addressable Memory ◽  
Ternary Content Addressable Memory

Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices

2009 ◽  
Vol 2 ◽  
pp. 023004 ◽  
Author(s):  
Shoun Matsunaga ◽  
Kimiyuki Hiyama ◽  
Atsushi Matsumoto ◽  
Shoji Ikeda ◽  
Haruhiro Hasegawa ◽  
...  
Keyword(s):  
Tunnel Junction ◽  
Magnetic Tunnel Junction ◽  
Memory Cell ◽  
Content Addressable Memory ◽  
Cell Chip ◽  
Ternary Content Addressable Memory ◽  
Standby Power
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