A simple implementation of a queue with a circularly linked list

2004 ◽  
Vol 36 (3) ◽  
pp. 274-274
Author(s):  
David B. Sher
2019 ◽  
Author(s):  
Indah Kusuma Astuti
Keyword(s):  

Linkedlistadalahstrukturdatayangpalingdasar.Linkedlistterdiriatassejumlah unsur-unsurdikelompokkan,atau terhubung,bersama-sama disuatu deretyang spesifik.Linked listbermanfaatdidalam memeliharakoleksi-koleksidata,yangserupadenganarray.Bagaimanapunjuga,linkedlistdan arraymempunyaiperbedaan.MemakaiLinked listlebih bagusdibandingkandenganarray/larikbaikdalam banyakhal.Secararinci,linkedlist lebih efisien di dalam melaksanakan penyisipan-penyisipan danpenghapusan- penghapusan. Linked list juga menggunakan alokasipenyimpanan secara dinamis, yang merupakan penyimpanan yangdialokasikanpadaruntime.Karenadidalam banyakaplikasi,ukurandaridataitutidakdiketahuipadasaatkompile,halinibisamerupakansuatuatributyangbaikjuga.Setiapnodeakanberbentukstructdanmemilikisatubuahfield bertipe structyang sama,yang berfungsisebagaipointer.Dalammenghubungkansetiapnode,kitadapatmenggunakancarafirst-create-firstaccess ataupun first-create-last-access.Yang berbeda dengan deklarasistructsebelumnyaadalahsatufieldbernamanext,yangbertipestructtnode.Halinisekilasdapatmembingungkan.Namun,satuhalyangjelas,variabelnextiniakanmenghubungkankitadengannodedisebelahkita,yangjugabertipestructtnode.Halinilahyangmenyebabkannextharusbertipestructtnode.KataKunci:linkedlist


Energies ◽  
2021 ◽  
Vol 14 (14) ◽  
pp. 4264
Author(s):  
Michal Gierczynski ◽  
Lech M. Grzesiak ◽  
Arkadiusz Kaszewski

This paper deals with a well-known problem of the transient DC-bias current occurring during a phase shift transition in dual active bridge (DAB) DC/DC converters. This phenomenon, if not compensated, can cause damage to the converter or deteriorate its performance. One aim of this paper is to present a solution which allows for the elimination of the undesired transient DC-bias component in current waveforms. This solution is the dual rising edge shift (DRES) compensation algorithm. It provides a very simple implementation and fast settling time within the first half of a switching period. Moreover, the solution is independent on any measurements or system parameter values. It is based on the double-sided single phase shift (DSSPS) modulation, which is described in detail along with a converter model in steady-state. Then, the mechanisms leading to the transient DC-bias are explained, and the compensation algorithm is derived. The performance of the algorithm has been tested using a laboratory prototype. A comprehensive set of tests, involving rapid step changes in power flow and frequency sweep, are provided. Finally, the features of the proposed algorithm are briefly discussed.


1997 ◽  
Vol 16 (2) ◽  
pp. 18-22
Author(s):  
Loren P. Meissner
Keyword(s):  

2015 ◽  
Vol 741 ◽  
pp. 856-859
Author(s):  
Yan Feng Zhai ◽  
Feng Xiang Zhang

This papercarries out a survey of sufficient schedulability analysis forfixed priority (FP) scheduling. The most common used fixed priority assignment is the rate monotonic (RM) algorithm, according to its policy, the task priorities are ordered based on their activation rates, so that the task with the shortest period is assigned the highest priority. However, when each task’s relative deadline is not equal to its period, the RM algorithm is not suitable to assign the task priorities. When relative deadlines are less than or equal to periods,the deadline monotonic (DM) algorithm can be deployed to schedule the tasks. The utilization based schedulability analysis has the advantage of simple implementation, and manyexisting schedulability analyses on uniprocessor are covered.


2000 ◽  
Vol 10 (3) ◽  
pp. 269-303 ◽  
Author(s):  
XAVIER LEROY

A simple implementation of an SML-like module system is presented as a module parameterized by a base language and its type-checker. This implementation is useful both as a detailed tutorial on the Harper–Lillibridge–Leroy module system and its implementation, and as a constructive demonstration of the applicability of that module system to a wide range of programming languages.


2009 ◽  
Vol 28 (3) ◽  
pp. 2-7 ◽  
Author(s):  
Jason R. Blevins
Keyword(s):  

2014 ◽  
Vol 532 ◽  
pp. 113-117
Author(s):  
Zhou Jin ◽  
Ru Jing Wang ◽  
Jie Zhang

The rotating machineries in a factory usually have the characteristics of complex structure and highly automated logic, which generated a large amounts of monitoring data. It is an infeasible task for uses to deal with the massive data and locate fault timely. In this paper, we explore the causality between symptom and fault in the context of fault diagnosis in rotating machinery. We introduce data mining into fault diagnosis and provide a formal definition of causal diagnosis rule based on statistic test. A general framework for diagnosis rule discovery based on causality is provided and a simple implementation is explored with the purpose of providing some enlightenment to the application of causality discovery in fault diagnosis of rotating machinery.


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