Using loop invariants to fight soft errors in data caches

Author(s):  
Sri Hari Krishna N ◽  
Seung Woo Son ◽  
Mahmut Kandemir ◽  
Feihui Li
Keyword(s):  
2010 ◽  
Vol 34 (6) ◽  
pp. 200-214 ◽  
Author(s):  
Ismail Kadayif ◽  
Hande Sen ◽  
Selcuk Koyuncu

2018 ◽  
Author(s):  
Oberon Dixon-Luinenburg ◽  
Jordan Fine

Abstract In this paper, we demonstrate a novel nanoprobing approach to establish cause-and-effect relationships between voltage stress and end-of-life performance loss and failure in SRAM cells. A Hyperion II Atomic Force nanoProber was used to examine degradation for five 6T cells on an Intel 14 nm processor. Ten minutes of asymmetrically applied stress at VDD=2 V was used to simulate a ‘0’ bit state held for a long period, subjecting each pullup and pulldown to either VDS or VGS stress. Resultant degradation caused read and hold margins to be reduced by 20% and 5% respectively for the ‘1’ state and 5% and 2% respectively for the ‘0’ state. ION was also reduced, for pulldown and pullup respectively, by 4.5% and 5.4% following VGS stress and 2.6% and 33.8% following VDS stress. Negative read margin failures, soft errors, and read time failures all become more prevalent with these aging symptoms whereas write stability is improved. This new approach enables highly specific root cause analysis and failure prediction for end-of-life in functional on-product SRAM.


2021 ◽  
Author(s):  
Alexandra Zimpeck ◽  
Cristina Meinhardt ◽  
Laurent Artola ◽  
Ricardo Reis

2021 ◽  
Vol 2 (2) ◽  
Author(s):  
Muhammad Sheikh Sadi ◽  
Waseem Ahmed ◽  
Jan Jürjens
Keyword(s):  

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