Analysis of Induced End-of-Life Failures in SRAM Through Nanoprobing

2018 ◽  
Author(s):  
Oberon Dixon-Luinenburg ◽  
Jordan Fine
Keyword(s):  
End Of Life ◽  
Soft Errors ◽  
Cause Analysis ◽  
New Approach ◽  
Performance Loss ◽  
Root Cause ◽  
Long Period ◽  
Atomic Force ◽  
Stress Resultant ◽  
Voltage Stress

Abstract In this paper, we demonstrate a novel nanoprobing approach to establish cause-and-effect relationships between voltage stress and end-of-life performance loss and failure in SRAM cells. A Hyperion II Atomic Force nanoProber was used to examine degradation for five 6T cells on an Intel 14 nm processor. Ten minutes of asymmetrically applied stress at VDD=2 V was used to simulate a ‘0’ bit state held for a long period, subjecting each pullup and pulldown to either VDS or VGS stress. Resultant degradation caused read and hold margins to be reduced by 20% and 5% respectively for the ‘1’ state and 5% and 2% respectively for the ‘0’ state. ION was also reduced, for pulldown and pullup respectively, by 4.5% and 5.4% following VGS stress and 2.6% and 33.8% following VDS stress. Negative read margin failures, soft errors, and read time failures all become more prevalent with these aging symptoms whereas write stability is improved. This new approach enables highly specific root cause analysis and failure prediction for end-of-life in functional on-product SRAM.

Failure of a Second Stage Valve Head on a LDPE Hyper Compressor

2004 ◽  
Author(s):  
Jan Keltjens ◽  
Marcel Hendrikx
Keyword(s):  
Fatigue Crack ◽  
Growth Analysis ◽  
Normal Operation ◽  
Remedial Measures ◽  
Chromium Layer ◽  
Cause Analysis ◽  
Root Cause ◽  
Second Stage ◽  
Long Period ◽  
Shrink Fit

After 16 years of operation a failure occurred in a 2nd stage valve head of a hyper compressor of a polyethylene plant. The inner cylinder of the shrink-fit assembly ruptured. The fracture was initiated on a fatigue crack starting in the chromium layer on the inner the bore of the valve head. The fatigue crack clearly indicated a large number of arrest lines showing that the failure must have developed over a rather long period of operation. At the location of the crack initiation under normal operation no alternating pressure is present. The paper describes a stress- and fatigue crack growth analysis of the valve head as well as the root cause analysis for the fatigue crack as well as remedial measures taken to prevent future failure.

Root Cause analysis of SG tube ODSCC indications within the tube sheets of NPP biblis unit A

2011 ◽  
pp. 78-86
Author(s):  
R. Kilian ◽  
J. Beck ◽  
H. Lang ◽  
V. Schneider ◽  
T. Schönherr ◽  
...  
Keyword(s):  
Root Cause Analysis ◽  
Cause Analysis ◽  
Root Cause

Racism revisited with a new approach

2019 ◽  
Vol 1 (1) ◽  
pp. 13-20
Author(s):  
Yann A. Meunier
Keyword(s):  
Mental Disorder ◽  
Action Plans ◽  
New Approach ◽  
Practical Action ◽  
Root Cause ◽  
Transmissible Disease

Racism is a scourge which has plagued societies for centuries. Its root cause can be found in the fear of others. Some authors have considered it as a mental disorder in its more severe forms. We approach it from a novel and highly actionable angle by comparing it to a transmissible disease, candidiasis, with which racism holds many essential similarities that we outline in details. We also suggest various ways to eradicate and mitigate racism through practical action plans.

Rule Construction and its Execution for Root Cause Analysis

2012 ◽  
Vol 132 (10) ◽  
pp. 1689-1697
Author(s):  
Yutaka Kudo ◽  
Tomohiro Morimura ◽  
Kiminori Sugauchi ◽  
Tetsuya Masuishi ◽  
Norihisa Komoda
Keyword(s):  
Root Cause Analysis ◽  
Cause Analysis ◽  
Root Cause

The Electrical Characterization and Physical Failure Analysis for Transistor Gate Leakage

2006 ◽  
Author(s):  
Tsung-Te Li ◽  
Chao-Chi Wu ◽  
Jung-Hsiang Chuang ◽  
Jon C. Lee
Keyword(s):  
Failure Analysis ◽  
Electrical Characterization ◽  
Physical Analysis ◽  
Gate Leakage ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Voltage Stress ◽  
Leakage Site

Abstract This article describes the electrical and physical analysis of gate leakage in nanometer transistors using conducting atomic force microscopy (C-AFM), nano-probing, transmission electron microscopy (TEM), and chemical decoration on simulated overstressed devices. A failure analysis case study involving a soft single bit failure is detailed. Following the nano-probing analysis, TEM cross sectioning of this failing device was performed. A voltage bias was applied to exaggerate the gate leakage site. Following this deliberate voltage overstress, a solution of boiling 10%wt KOH was used to etch decorate the gate leakage site followed by SEM inspection. Different transistor leakage behaviors can be identified with nano-probing measurements and then compared with simulation data for increased confidence in the failure analysis result. Nano-probing can be used to apply voltage stress on a transistor or a leakage path to worsen the weak point and then observe the leakage site easier.

Root Cause Analysis Techniques Using Picosecond Time Resolved LADA

2014 ◽  
Author(s):  
Dan Bodoh ◽  
Kent Erington ◽  
Kris Dickson ◽  
George Lange ◽  
Carey Wu ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Picosecond Laser ◽  
Root Cause Analysis ◽  
Fault Isolation ◽  
Time Resolved ◽  
Cause Analysis ◽  
Root Cause ◽  
Design And Manufacturing ◽  
Multiple Interactions ◽  
Established Technique

Abstract Laser-assisted device alteration (LADA) is an established technique used to identify critical speed paths in integrated circuits. LADA can reveal the physical location of a speed path, but not the timing of the speed path. This paper describes the root cause analysis benefits of 1064nm time resolved LADA (TR-LADA) with a picosecond laser. It shows several examples of how picosecond TR-LADA has complemented the existing fault isolation toolset and has allowed for quicker resolution of design and manufacturing issues. The paper explains how TR-LADA increases the LADA localization resolution by eliminating the well interaction, provides the timing of the event detected by LADA, indicates the propagation direction of the critical signals detected by LADA, allows the analyst to infer the logic values of the critical signals, and separates multiple interactions occurring at the same site for better understanding of the critical signals.

Root Cause Analysis for Pin Leakage

2016 ◽  
Author(s):  
Zhigang Song ◽  
Jochonia Nxumalo ◽  
Manuel Villalobos ◽  
Sweta Pendyala
Keyword(s):  
Failure Analysis ◽  
Root Cause Analysis ◽  
Advanced Technology ◽  
Process Step ◽  
Cause Analysis ◽  
Hard Mask ◽  
Technology Node ◽  
Root Cause ◽  
Tools And Techniques

Abstract Pin leakage continues to be on the list of top yield detractors for microelectronics devices. It is simply manifested as elevated current with one pin or several pins during pin continuity test. Although many techniques are capable to globally localize the fault of pin leakage, root cause analysis and identification for it are still very challenging with today’s advanced failure analysis tools and techniques. It is because pin leakage can be caused by any type of defect, at any layer in the device and at any process step. This paper presents a case study to demonstrate how to combine multiple techniques to accurately identify the root cause of a pin leakage issue for a device manufactured using advanced technology node. The root cause was identified as under-etch issue during P+ implantation hard mask opening for ESD protection diode, causing P+ implantation missing, which was responsible for the nearly ohmic type pin leakage.

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