scholarly journals Using chip multithreading to speed up scenario-based design space exploration

Author(s):  
Peter van Stralen ◽  
Andy D. Pimentel
Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 2980
Author(s):  
Muhammad Kashif ◽  
Saif Al-Kuwari

The unprecedented success of classical neural networks and the recent advances in quantum computing have motivated the research community to explore the interplay between these two technologies, leading to the so-called quantum neural networks. In fact, universal quantum computers are anticipated to both speed up and improve the accuracy of neural networks. However, whether such quantum neural networks will result in a clear advantage on noisy intermediate-scale quantum (NISQ) devices is still not clear. In this paper, we propose a systematic methodology for designing quantum layer(s) in hybrid quantum–classical neural network (HQCNN) architectures. Following our proposed methodology, we develop different variants of hybrid neural networks and compare them with pure classical architectures of equivalent size. Finally, we empirically evaluate our proposed hybrid variants and show that the addition of quantum layers does provide a noticeable computational advantage.


Author(s):  
Giuseppe Ascia ◽  
Vincenzo Catania ◽  
Alessandro G. Di Nuovo ◽  
Maurizio Palesi ◽  
Davide Patti

Multi-Objective Evolutionary Algorithms (MOEAs) have received increasing interest in industry, because they have proved to be powerful optimizers. Despite the great success achieved, MOEAs have also encountered many challenges in real-world applications. One of the main difficulties in applying MOEAs is the large number of fitness evaluations (objective calculations) that are often needed before a well acceptable solution can be found. In fact, there are several industrial situations in which both fitness evaluations are computationally expensive and, meanwhile, time available is very low. In this applications efficient strategies to approximate the fitness function have to be adopted, looking for a trade-off between optimization performances and efficiency. This is the case of a complex embedded system design, where it is needed to define an optimal architecture in relation to certain performance indexes respecting strict time-to-market constraints. This activity, known as Design Space Exploration DSE), is still a great challenge for the EDA (Electronic Design Automation) community. One of the most important bottleneck in the overall design flow of a embedded system is due to the simulation. Simulation occurs at every phase of the design flow and it is used to evaluate a system candidate to be implemented. In this chapter we focus on system level design proposing a hybrid computational intelligence approach based on fuzzy approximation to speed up the evaluation of a candidate system. The methodology is applied to a real case study: optimization of the performance and power consumption of an embedded architecture based on a Very Long Instruction Word (VLIW) microprocessor in a mobile multimedia application domain. The results, carried out on a multimedia benchmark suite, are compared, in terms of both performance and efficiency, with other MOGAs strategies to demonstrate the scalability and the accuracy of the proposed approach.


2017 ◽  
Vol 4 (4) ◽  
pp. 249-255 ◽  
Author(s):  
James E. Richie ◽  
Cristinel Ababei

Abstract In this paper, we present a new software framework for the optimization of the design of microstrip patch antennas. The proposed simulation and optimization framework implements a simulated annealing algorithm to perform design space exploration in order to identify the optimal patch antenna design. During each iteration of the optimization loop, we employ the popular MEEP simulation tool to evaluate explored design solutions. To speed up the design space exploration, the software framework is developed to run multiple MEEP simulations concurrently. This is achieved using multithreading to implement a manager-workers execution strategy. The number of worker threads is the same as the number of cores of the computer that is utilized. Thus, the computational runtime of the proposed software framework enables effective design space exploration. Simulations demonstrate the effectiveness of the proposed software framework. Highlights A software framework for the optimization of the design of microstrip patch antennas. A simulated annealing algorithm to perform the design space exploration. The popular MEEP simulator is employed to evaluate explored solutions for accuracy. Multithreading is used as a technique to speed-up the proposed tool.


Author(s):  
Adrian G. Caburnay ◽  
Jonathan Gabriel S.A. Reyes ◽  
Anastacia P. Ballesil-Alvarez ◽  
Maria Theresa G. de Leon ◽  
John Richard E. Hizon ◽  
...  

2019 ◽  
Vol 18 (5s) ◽  
pp. 1-22 ◽  
Author(s):  
Daniel D. Fong ◽  
Vivek J. Srinivasan ◽  
Kourosh Vali ◽  
Soheil Ghiasi

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