Experiences with High-Level Design and Modelling of Digital Systems
1995 ◽
Vol 32
(4)
◽
pp. 333-340
Keyword(s):
Experiences with high-level design and modelling of digital systems Design and modelling of digital systems has been taught at the University of Reading for six years, using Silvar-Lisco HELIX and lately IEEE Standard VHDL hardware description languages. Three exercises have been used throughout this time. These are: modelling of a multiplier-accumulator, design and modelling of a transversal filter, and specification-level modelling of a FIFO.
Keyword(s):
2021 ◽
Vol 17
(2)
◽
pp. 1-16
2017 ◽
Vol 7
(4)
◽
pp. 2192
2010 ◽
Vol 21
(1)
◽
pp. 21-58
◽
1995 ◽
Vol 21
(5)
◽
pp. 311-320
◽
2013 ◽
Vol 18
(1)
◽
pp. 1-16
◽