Design of low voltage and low power 0.32 V 0.4 mW based on current reuse VCO with transformer feedback and body-biasing techniques

2013 ◽  
pp. 273-276
Author(s):  
Meng-Ting Hsu ◽  
Wei-Jhih Li ◽  
Yu-Ru Qiu
2019 ◽  
Vol 92 ◽  
pp. 104602 ◽  
Author(s):  
K. Hari Kishore ◽  
V. Senthil Rajan ◽  
R. Sanjay ◽  
B. Venkataramani

2019 ◽  
Vol 28 (13) ◽  
pp. 1950215
Author(s):  
Pratosh Kumar Pal ◽  
Rajendra Kumar Nagaria

A low-voltage and low-power all-MOSFET voltage reference is presented having most of the transistors working in subthreshold region. The basic beta-multiplier with cascode transistor provides a supply-independent current utilized by the active load circuit to generate an output reference voltage using body biasing. The proposed circuit is simulated using standard SCL 180-nm CMOS technology for the supply voltage ranging from 0.75[Formula: see text]V to 1.8[Formula: see text]V. The simulation obtains an average output voltage reference of 450.4[Formula: see text]mV for the given supply range at room temperature. The minimum power dissipation at room temperature is 54.37[Formula: see text]nW. The temperature coefficient (TC) of 28.13[Formula: see text]ppm/∘C is achieved having the temperature range of [Formula: see text]10–87∘C for the minimum operating supply voltage. It has the PSRR values of [Formula: see text]39.4[Formula: see text]dB at 100[Formula: see text]Hz and [Formula: see text]12[Formula: see text]dB at 1[Formula: see text]MHz. Also, the active area of the proposed circuit is 0.014[Formula: see text]mm2.


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