subthreshold region
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Author(s):  
Suleshma Katiyar ◽  
Neha Verma ◽  
Jyotika Jogi

Abstract This paper presents a compact analytical DC model for high mobility VOPc (vanadyl pthalocyanine)/p-6P (para-sexiphenyl) ambipolar organic heterojunction field-effect transistor (OHJFET). The proposed model accounts for both unipolar and ambipolar regimes of VOPc/p-6P ambipolar OHJFET by considering spatial charge carrier density in the channel. The model incorporates subthreshold conduction phenomenon in addition to describing beyond threshold transport. The model is extended to describe ambipolar regime occurring in subthreshold region at low drain to source voltage, VDS. Device characteristics and various parameters obtained are presented and are further used to model recombination zone and channel potential profile. Results obtained, are compared with available experimental data and a good match is observed.


Author(s):  
Jiabo Chen ◽  
Zhihong Liu ◽  
Haiyong Wang ◽  
Xiaoxiao Zhu ◽  
Dan Zhu ◽  
...  

Abstract In this paper, a simple method based on subthreshold slopes was proposed to investigate the interface trap characteristics in a p-channel GaN MOSFET with a p-GaN/AlGaN/GaN structure on Si. The energy distribution of the interface trap density has been extracted from the analysis of the transfer characteristics in the subthreshold region of operation. The interface trap densities and respective energy distribution at both room temperature and 150 ℃ were also calculated from the ac conductance measurements at corresponding applied biases. Both characterization methods show similar results of trap densities and energy levels.


Author(s):  
Hassan Faraji Baghtash ◽  
Rasoul Pakdel

low-voltage, low-power, rail-to-rail, two-stage trans-conductance amplifier is presented. The structure exploits body-driven transistors, configured in folded-cascode structure. To reduce the power consumption, the transistors are biased in the subthreshold region. The Specter RF simulation results which are conducted in TSMC 180nm CMOS standard process proves the well-performance of the proposed structure. The performance of the proposed structure against process variations is checked through process corners and Monte Carlo simulations. The results prove the robustness of the proposed amplifier against process uncertainties. Some important specifications of the design derived from circuit simulations are 93.36 dB small-signal gain, 14.4 PV2/Hz input referred noise power, 26.5 kHz unity gain frequency, 20 V/ms slew rate. The proposed structure draws 260 nW power from 0.5 V power supply and is loaded with a 15 pF loading capacitor. The input common mode range of structure is from 0 to 0.5 V.


2021 ◽  
Author(s):  
Deepak Kumar Panda ◽  
Rajan Singh ◽  
Trupti Lenka ◽  
Vishal Goyal ◽  
Nour El I Boukortt ◽  
...  

In this paper, a dielectric modulated negative capacitance (NC)-MoS<sub>2</sub> field effect transistor (FET)-based biosensor is proposed for label-free detection of biomolecules such as enzymes, proteins, DNA, etc. Various reports present experimental demonstration and modelling of NC-MoS<sub>2</sub> FET, but it is never utilized as a dielectric modulated biosensor. Therefore, in this work, the modelling, characterization and sensitivity analysis of dielectric modulated NC-MoS<sub>2</sub> FET is focussed. For immobilization of biomolecules, a nanocavity is formed below the gate by etching some portion of the gate oxide material. The immobilization of biomolecules in the cavity leads to a variation of different electrostatic properties such as surface potential, threshold voltage, drain current, and subthreshold-swing (SS) which can be utilized as sensing parameters. An analytical model for the proposed biosensor is also developed in the subthreshold region by considering the properties of two-dimensional (2D) ferroelectric materials and benchmarked with TCAD device simulations. The effect of change of gate length and doping concentration on different electrical properties is also analysed to estimate the optimum value of channel doping. The results prove that the proposed device can be used for next-generation low power label-free biosensor which shows enhanced sensitivity as compared to traditional FET-based biosensors.


2021 ◽  
Author(s):  
Deepak Kumar Panda ◽  
Rajan Singh ◽  
Trupti Lenka ◽  
Vishal Goyal ◽  
Nour El I Boukortt ◽  
...  

In this paper, a dielectric modulated negative capacitance (NC)-MoS<sub>2</sub> field effect transistor (FET)-based biosensor is proposed for label-free detection of biomolecules such as enzymes, proteins, DNA, etc. Various reports present experimental demonstration and modelling of NC-MoS<sub>2</sub> FET, but it is never utilized as a dielectric modulated biosensor. Therefore, in this work, the modelling, characterization and sensitivity analysis of dielectric modulated NC-MoS<sub>2</sub> FET is focussed. For immobilization of biomolecules, a nanocavity is formed below the gate by etching some portion of the gate oxide material. The immobilization of biomolecules in the cavity leads to a variation of different electrostatic properties such as surface potential, threshold voltage, drain current, and subthreshold-swing (SS) which can be utilized as sensing parameters. An analytical model for the proposed biosensor is also developed in the subthreshold region by considering the properties of two-dimensional (2D) ferroelectric materials and benchmarked with TCAD device simulations. The effect of change of gate length and doping concentration on different electrical properties is also analysed to estimate the optimum value of channel doping. The results prove that the proposed device can be used for next-generation low power label-free biosensor which shows enhanced sensitivity as compared to traditional FET-based biosensors.


2021 ◽  
Author(s):  
Sarita Misra ◽  
Sudhansu Mohan Biswal ◽  
Biswajit Baral ◽  
Sanjit Kumar Swain ◽  
Sudhansu Kumar Pati

Abstract This paper explores the potential advantage of surrounded gate junctionless graded channel (SJLGC) MOSFET in the view of its Analog, RF performances using ATLAS TCAD device simulator. The impact of graded channel in the lateral direction on the potential, electric field, and velocity of carriers, energy band along the channel is investigated systematically. The present work mainly emphasises on the superior performance of SJLGC MOSFET by showing higher drain current (ID) , transconductance (gm) ,cut off frequency (fT) , maximum frequency of oscillation (fmax) , critical frequency (fK) .The drain current is improved by 10.03 % in SJLGC MOSFET due to the impact of grading the channel. There is an improvement in fT, fmax, fK by 45%, 29% and 18% respectively in SJLGC MOSFET showing better RF Performance. The dominance of the SJLGC MOSFET over SJL MOSFET is further elucidated by showing 74% improvement in intrinsic voltage gain (gm / gds) indicating its better applications in sub threshold region. But the transconductance generation factor of SJLGC MOSFET is less than SJL MOSFET in the subthreshold region. The intrinsic gate delay (ζD) of SJLGC MOSFET is less in comparison to SJL MOSFET due to the impact of lower gate to gate capacitance (CGG) suggesting better digital switching applications. The simulation results reveal that SJLGC MOSFET can be a competitive contender for the coming generation of RF circuits covering a broad range of operating frequencies in RF spectrum.


2021 ◽  
Author(s):  
Shahin S. Lotfabadi

Power is a significant design constraint for implementing portable applications. Operating transistors in the subthreshold region can significantly reduce power consumption while reducing performance. The low frequency nature of biosignals makes a FPGA operating subthreshold region a good candidate. In this work, I investigate the feasibility of desinging such a device and the trade-off between power consumpation and performance for FPGA routing resources operating in the subthreshold region. For the 32nm Predictive Technology Model studied in this work, it was observed a power reduction of 197.7 times (or power-delay-product reduction of 3.3 times) for operating under a supply voltage of 0.4 volts (as compared to normal operation in the saturation region using a 0.9V). Under a supply voltage of 0,4 volts, FPGA can operate at 2.0 MHz while allowing signals to propagate unregistered through 20 routing tracks which meets the real-time requirement for processing 20000 samples per second.


2021 ◽  
Author(s):  
Shahin S. Lotfabadi

Power is a significant design constraint for implementing portable applications. Operating transistors in the subthreshold region can significantly reduce power consumption while reducing performance. The low frequency nature of biosignals makes a FPGA operating subthreshold region a good candidate. In this work, I investigate the feasibility of desinging such a device and the trade-off between power consumpation and performance for FPGA routing resources operating in the subthreshold region. For the 32nm Predictive Technology Model studied in this work, it was observed a power reduction of 197.7 times (or power-delay-product reduction of 3.3 times) for operating under a supply voltage of 0.4 volts (as compared to normal operation in the saturation region using a 0.9V). Under a supply voltage of 0,4 volts, FPGA can operate at 2.0 MHz while allowing signals to propagate unregistered through 20 routing tracks which meets the real-time requirement for processing 20000 samples per second.


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