Effect of Metallic Contamination on Interface Properties and Oxide Reliability

New and emerging process technologies such as Damascene interconnect, metal gate and metal silicide processes are creating metal contamination control challenges for current and future generations of integrated circuits. In this work, we studied the contamination of oxidized silicon wafers by several metals of industrial importance including copper, cobalt, sodium, iron and nickel. Contamination was applied by spin-coating in a range from 20ppb to 500 ppb. Such levels are representative of exposure challenges induced during chemical processes such as CMP (chemical mechanical planarization) cleans. Solvated contamination ions were driven into the oxide layer by corona temperature stress (CTS). The concentrations of metallic species incorporated within the oxide by CTS were quantified using VPD-ICPMS (vapor phase decomposition) and SIMS (secondary ion mass spectrometry) surface analysis techniques. Noncontact COCOS (Corona Oxide Characterization of Semiconductor) methods were employed to measure the electrical properties and reliability of nascent and contaminated oxide/silicon structures. We show that in the absence of significant signals from the surface analysis techniques the COCOS methods show signatures of the metallic contamination in the measurement results.