scholarly journals Redundant Fault-tolerant Computer Structure Based On Dynamic Reconfiguration Bus

Author(s):  
Wang Ying ◽  
Zhou Ji-qin ◽  
Zhang Wei-gong ◽  
Ding Li-hua
Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2210
Author(s):  
Luís Caseiro ◽  
André Mendes

Fault-tolerance is critical in power electronics, especially in Uninterruptible Power Supplies, given their role in protecting critical loads. Hence, it is crucial to develop fault-tolerant techniques to improve the resilience of these systems. This paper proposes a non-redundant fault-tolerant double conversion uninterruptible power supply based on 3-level converters. The proposed solution can correct open-circuit faults in all semiconductors (IGBTs and diodes) of all converters of the system (including the DC-DC converter), ensuring full-rated post-fault operation. This technique leverages the versatility of Finite-Control-Set Model Predictive Control to implement highly specific fault correction. This type of control enables a conditional exclusion of the switching states affected by each fault, allowing the converter to avoid these states when the fault compromises their output but still use them in all other conditions. Three main types of corrective actions are used: predictive controller adaptations, hardware reconfiguration, and DC bus voltage adjustment. However, highly differentiated corrective actions are taken depending on the fault type and location, maximizing post-fault performance in each case. Faults can be corrected simultaneously in all converters, as well as some combinations of multiple faults in the same converter. Experimental results are presented demonstrating the performance of the proposed solution.


2016 ◽  
Vol 26 (03) ◽  
pp. 1750037 ◽  
Author(s):  
Xiaofeng Zhou ◽  
Lu Liu ◽  
Zhangming Zhu

Network-on-Chip (NoC) has become a promising design methodology for the modern on-chip communication infrastructure of many-core system. To guarantee the reliability of traffic, effective fault-tolerant scheme is critical to NoC systems. In this paper, we propose a fault-tolerant deflection routing (FTDR) to address faults on links and router by redundancy technique. The proposed FTDR employs backup links and a redundant fault-tolerant unit (FTU) at router-level to sustain the traffic reliability of NoC. Experimental results show that the proposed FTDR yields an improvement of routing performance and fault-tolerant capability over the reported fault-tolerant routing schemes in average flit deflection rate, average packet latency, saturation throughput and reliability by up to 13.5%, 9.8%, 10.6% and 17.5%, respectively. The layout area and power consumption are increased merely 3.5% and 2.6%.


IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 76241-76249 ◽  
Author(s):  
Bo Wang ◽  
Jiapeng Hu ◽  
Wei Hua

2019 ◽  
Vol 139 (2) ◽  
pp. 187-192
Author(s):  
Seiya Ogido ◽  
Chikatoshi Yamada ◽  
Kei Miyagi ◽  
Shuichi Ichikawa ◽  
Naoki Fujieda

Sign in / Sign up

Export Citation Format

Share Document