Mixed-signal generator module:Design and Verification in MATLAB and Verilog hardware description language
2020 ◽
Vol 8
(9)
◽
pp. 5064-5069
Analysis and implementation of SDF Radix-2 FFT processor using VERILOG Hardware Description Language
2020 ◽
Vol 9
(4)
◽
pp. 5185-5189
2000 ◽
pp. 277-296
◽
1999 ◽
Vol 46
(10)
◽
pp. 1263-1272
◽
Keyword(s):
2020 ◽
Vol 9
(4)
◽
pp. 5762-5767
2012 ◽
Vol 19
(4)
◽
pp. 459-490
◽
2019 ◽
Vol 8
(9S2)
◽
pp. 512-514