Fault Analysis of Power Network based on Node Impedance Matrix

2020 ◽  
Vol 2 (3) ◽  
pp. 78-88
Author(s):  
Xia Dabin
Author(s):  
Boniface Onyemaechi Anyaka ◽  
Innocent Onyebuchi Ozioko

Fault analysis is the process of determining the magnitude of fault voltage and current during the occurrence of different types of fault in electrical power system. Transmission line fault analysis is usually done for both symmetrical and unsymmetrical faults. Symmetrical faults are called three-phase balance fault while unsymmetrical faults include: single line-to-ground, line-to-line, and double line-to-ground faults. In this research, bus impedance matrix method for fault analysis is presented. Bus impedance matrix approach has several advantages over Thevenin’s equivalent method and other conventional approaches. This is because the off-diagonal elements represent the transfer impedance of the power system network and helps in calculating the branch fault currents during a fault. Analytical and simulation approaches on a single line-to-ground fault on 3-bus power system network under bolted fault condition were used for the study. Both methods were compared and result showed negligible deviation of 0.02% on the average. The fault currents under bolted condition for the single line-to-ground fault were found to be 4. 7244p.u while the bus voltage is 0. 4095p.u for buses 1 and 2 respectively and 0. 00p.u for bus 3 since the fault occurred at this bus. Therefore, there is no need of burdensomely connecting the entire three sequence network during fault analysis in electrical power system.


2011 ◽  
Vol 128-129 ◽  
pp. 753-758
Author(s):  
Dong Xu Wang ◽  
Jian Le ◽  
Xiao Lei ◽  
Cai Xia Yang ◽  
Xue Zheng ◽  
...  

This paper proposed a voltage dip analyzing method for multiple faults condition in complex power network. This method regarded the fault points as virtual buses and introduced multiple fault position parameters into voltage dip analysis. It expanded the node impedance matrix by calculating the self-impedance of the virtual bus, the mutual impedance between virtual bus and non-fault bus, one virtual bus and another. According to the faults boundary conditions, each fault current phasor was calculated. The fault voltage function of any bus related with the multiple fault position parameters in the power network was derived. The voltage dip analysis result was obtained associated with the voltage dip threshold. The proposed method was validated in the standard IEEE-30 bus system.


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