scholarly journals An Integrated Perspective of Crucial Research Issues in NoC Router Design

A new reliable high throughput NOC router design is proposed with FSM based smart arbiter module for 4X4 Mesh architecture. This design is based the XY routing algorithm with prioritized round robin arbitration and synthesis of the proposed design is done on Spartan III FPGA. An enhanced work is also done in this paper to explore the drawbacks of the exceptional techniques of the existing generation and to research the scope for overall performance improvisation of the NoC designing

2018 ◽  
Vol 15 (17) ◽  
pp. 20180635-20180635
Author(s):  
Hongyu Meng ◽  
Lei Yang ◽  
Zijun Liu ◽  
Donglin Wang

2021 ◽  
Vol 13 (5) ◽  
pp. 75-87
Author(s):  
Linz Tom ◽  
Bindu V.R.

Cloud computing has an indispensable role in the modern digital scenario. The fundamental challenge of cloud systems is to accommodate user requirements which keep on varying. This dynamic cloud environment demands the necessity of complex algorithms to resolve the trouble of task allotment. The overall performance of cloud systems is rooted in the efficiency of task scheduling algorithms. The dynamic property of cloud systems makes it challenging to find an optimal solution satisfying all the evaluation metrics. The new approach is formulated on the Round Robin and the Shortest Job First algorithms. The Round Robin method reduces starvation, and the Shortest Job First decreases the average waiting time. In this work, the advantages of both algorithms are incorporated to improve the makespan of user tasks.


2013 ◽  
Vol 2013 ◽  
pp. 1-24
Author(s):  
Emna Amouri ◽  
Habib Mehrez ◽  
Zied Marrakchi

The wave dynamic differential logic (WDDL) has been identified as a promising countermeasure to increase the robustness of cryptographic devices against differential power attacks (DPA). However, to guarantee the effectiveness of WDDL technique, the routing in both the direct and complementary paths must be balanced. This paper tackles the problem of unbalance of dual-railsignals in WDDL design. We describe placement techniques suitable for tree-based and mesh-based FPGAs and quantify the gain they confer. Then, we introduce a timing-balance-driven routing algorithm which is architecture independent. Our placement and routing techniques proved to be very promising. In fact, they achieve a gain of 95%, 93%, and 85% in delay balance in tree-based, simple mesh, and cluster-based mesh architectures, respectively. To reduce further the switch and delay unbalance in Mesh architecture, we propose a differential pair routing algorithm that is specific to cluster-based mesh architecture. It achieves perfectly balanced routed signals in terms of wire length and switch number.


2016 ◽  
Vol 2016 ◽  
pp. 1-11 ◽  
Author(s):  
Supriya Raheja

Fuzzy based CPU scheduler has become of great interest by operating system because of its ability to handle imprecise information associated with task. This paper introduces an extension to the fuzzy based round robin scheduler to a Vague Logic Based Round Robin (VBRR) scheduler. VBRR scheduler works on 2-layered framework. At the first layer, scheduler has a vague inference system which has the ability to handle the impreciseness of task using vague logic. At the second layer, Vague Logic Based Round Robin (VBRR) scheduling algorithm works to schedule the tasks. VBRR scheduler has the learning capability based on which scheduler adapts intelligently an optimum length for time quantum. An optimum time quantum reduces the overhead on scheduler by reducing the unnecessary context switches which lead to improve the overall performance of system. The work is simulated using MATLAB and compared with the conventional round robin scheduler and the other two fuzzy based approaches to CPU scheduler. Given simulation analysis and results prove the effectiveness and efficiency of VBRR scheduler.


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