Qualitative Analysis for Visual Attention of Students by Using the Technology of ICT

2021 ◽  
pp. 1-26
Author(s):  
Muhammad Farhan ◽  
Muhammad Salar Haider ◽  
N. Z. Jhanjhi ◽  
Rana Muhammad Amir Latif ◽  
Muhammad Yasir Bilal
Keyword(s):  
Machine Learning ◽  
Visual Attention ◽  
Software Package ◽  
Video Stream ◽  
Learning Tools ◽  
Eye Detection ◽  
Real Time Processing ◽  
Time Processing ◽  
Ict Tools ◽  
Attention Level

ICT tools and machine learning tools are used to analyze the visual attention of the student. The student's attention score is calculated for the analysis of the visual attention of the student. For this purpose, the authors have developed a software package (i.e., Visual Attention Tool [VAT]) based on the ICT that extracts the frames from a video stream that is taken through the webcam attached to the student's laptop. Each image is converted into a grayscale image, enhanced by image processing, then face detection is performed by following eye detection. This real-time processing of video produces a dataset by tracking the faces and eyes. It measures the attention level of the student with the timestamp. A manual observer also calculates the student's attention score focusing face and eye contact and produces a dataset manually. Then a comparative analysis of both datasets is performed in statistical and machine learning tools.

scholarly journals A Connected Component Labelling algorithm for multi-pixel per clock cycle video stream

2021 ◽  
Author(s):  
Marcin Kowalczyk ◽  
Tomasz Kryjak
Keyword(s):  
Data Stream ◽  
Hardware Implementation ◽  
Clock Cycle ◽  
Video Stream ◽  
Connected Component ◽  
Real Time Processing ◽  
Time Processing ◽  
Evaluation Board ◽  
Labelling Method ◽  
Labelling Algorithm

This work describes the hardware implementation of a connected component labelling (CCL) module in reprogammable logic. The main novelty of the design is the ``full'', i.e. without any simplifications, support of a 4 pixel per clock format (4 ppc) and real-time processing of a 4K/UltraHD video stream (3840 x 2160 pixels) at 60 frames per second. To achieve this, a special labelling method was designed and a functionality that stops the input data stream in order to process pixel groups which require writing more than one merger into the equivalence table. The proposed module was verified in simulation and in hardware on the Xilinx Zynq Ultrascale+ MPSoC chip on the ZCU104 evaluation board.

scholarly journals AutoSelect: What You Want Is What You Get: Real-Time Processing of Visual Attention and Affect

2006 ◽  
pp. 40-52 ◽  
Author(s):  
Nikolaus Bee ◽  
Helmut Prendinger ◽  
Arturo Nakasone ◽  
Elisabeth André ◽  
Mitsuru Ishizuka
Keyword(s):  
Visual Attention ◽  
Real Time ◽  
Real Time Processing ◽  
Time Processing

scholarly journals A Connected Component Labelling algorithm for multi-pixel per clock cycle video stream

2021 ◽  
Author(s):  
Marcin Kowalczyk ◽  
Tomasz Kryjak
Keyword(s):  
Data Stream ◽  
Hardware Implementation ◽  
Clock Cycle ◽  
Video Stream ◽  
Connected Component ◽  
Real Time Processing ◽  
Time Processing ◽  
Evaluation Board ◽  
Labelling Method ◽  
Labelling Algorithm

This work describes the hardware implementation of a connected component labelling (CCL) module in reprogammable logic. The main novelty of the design is the ``full'', i.e. without any simplifications, support of a 4 pixel per clock format (4 ppc) and real-time processing of a 4K/UltraHD video stream (3840 x 2160 pixels) at 60 frames per second. To achieve this, a special labelling method was designed and a functionality that stops the input data stream in order to process pixel groups which require writing more than one merger into the equivalence table. The proposed module was verified in simulation and in hardware on the Xilinx Zynq Ultrascale+ MPSoC chip on the ZCU104 evaluation board.

scholarly journals Real-Time FPGA Implementation of Parallel Connected Component Labelling for a 4K Video Stream

2021 ◽  
Author(s):  
Marcin Kowalczyk ◽  
Piotr Ciarach ◽  
Dominika Przewlocka-Rus ◽  
Hubert Szolc ◽  
Tomasz Kryjak
Keyword(s):  
Real Time ◽  
Hardware Implementation ◽  
Video Stream ◽  
Fpga Implementation ◽  
Connected Component ◽  
Reconfigurable Logic ◽  
Real Time Processing ◽  
Time Processing ◽  
Single Pass ◽  
4K Uhd

AbstractIn this paper, a hardware implementation in reconfigurable logic of a single-pass connected component labelling (CCL) and connected component analysis (CCA) module is presented. The main novelty of the design is the support of a video stream in 2 and 4 pixel per clock format (2 and 4 ppc) and real-time processing of 4K/UHD video stream (3840 x 2160 pixels) at 60 frames per second. We discuss several approaches to the issue and present in detail the selected ones. The proposed module was verified in an exemplary application – skin colour areas segmentation – on the ZCU 102 and ZCU 104 evaluation boards equipped with Xilinx Zynq UltraScale+ MPSoC devices.

A Comparative Study of Different Machine Learning Tools

2019 ◽  
Vol 7 (4) ◽  
pp. 184-190
Author(s):  
Himani Maheshwari ◽  
Pooja Goswami ◽  
Isha Rana
Keyword(s):  
Machine Learning ◽  
Comparative Study ◽  
Learning Tools

GPU Acceleration of Algorithm to Design Directional Volumetric Display for Real-time Processing

2019 ◽  
pp. 989
Author(s):  
Daiki Matsumoto ◽  
Ryuji Hirayama ◽  
Naoto Hoshikawa ◽  
Hirotaka Nakayama ◽  
Tomoyoshi Shimobaba ◽  
...  
Keyword(s):  
Real Time ◽  
Gpu Acceleration ◽  
Real Time Processing ◽  
Time Processing ◽  
Volumetric Display
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