Loop Detection Based on Bit-Flipping Decoding Algorithm for LDPC Codes

2011 ◽  
Vol 271-273 ◽  
pp. 452-457
Author(s):  
Zhong Xun Wang ◽  
Fang Qiang Zhu ◽  
Li Liu ◽  
Juan Wang
Keyword(s):  
Additive White Gaussian Noise ◽  
Ldpc Codes ◽  
Soft Decision ◽  
Decoding Algorithm ◽  
Excellent Performance ◽  
Detection Mechanism ◽  
Decoding Algorithms ◽  
Loop Detection ◽  
Soft Decision Decoding ◽  
Parity Check Codes

In this paper, we introduce a new bit-flipping decoding algorithm for low-density parity-check codes based on loop detection mechanism, which is an extension to soft-decision decoding. This decoding algorithm's performance has been significantly improved by introducing a loop detection mechanism for the failed flipping bit and leading into the soft-decision about the reliability measure of the received symbols. Theoretical analysis shows that the complexity of this algorithm is lower. Some simulation results are given, which show that compared with other known kinds of bit-flipping decoding algorithms for LDPC codes, this new decoding on the additive white Gaussian noise channel offer excellent performance.

scholarly journals The Decoding Algorithms For Error-Correcting Product Codes Based On Project Geometry Low-Density Parity-Check Codes

2020 ◽  
Vol 12 (3) ◽  
pp. 399-406
Author(s):  
Lev E. Nazarov ◽  
Keyword(s):  
Turbo Codes ◽  
Ldpc Codes ◽  
Parity Check ◽  
Decoding Algorithm ◽  
Signal Noise ◽  
Product Codes ◽  
Decoding Algorithms ◽  
Low Density Parity Check ◽  
Code Constructions ◽  
Parity Check Codes

The focus of this paper is directed towards the investigation of the characteristics of symbol-by-symbol iterative decoding algorithms for error-correcting block product-codes (block turbo-codes) which enable to reliable information transfer at relatively low received signal/noise and provide high power efficiency. Specific feature of investigated product codes is construction with usage of low-density parity-check codes (LDPC) and these code constructions are in the class of LDPC too. According to this fact the considered code constructions have symbol-by-symbol decoding algorithms developed for total class LDPC codes, namely BP (belief propagation) and its modification MIN_SUM_BP. The BP decoding algorithm is iterative and for implementation the signal/noise is required, for implementation of MIN_SUM_BP decoding algorithm the signal/noise is not required. The resulted characteristics of product codes constructed with usage of LDPC based on project geometry (length of code words, information volume, code rate, error performances) are presented in this paper. These component LDPC codes are cyclic and have encoding and decoding algorithms with low complexity implementation. The computer simulations for encoding and iterative symbol-by-symbol decoding algorithms for the number of turbo-codes with different code rate and information volumes are performed. The results of computer simulations have shown that MIN_SUM_BP decoding algorithm is more effective than BP decoding algorithm for channel with additive white gaussian noise concerning error-performances.

scholarly journals Improved Decoding of Linear Block Codes by Concatenated Decoders

2020 ◽  
Vol 8 (5) ◽  
pp. 363-371
Keyword(s):  
Communication Channel ◽  
Block Codes ◽  
Dual Code ◽  
Soft Decision ◽  
Decoding Algorithm ◽  
Word Decoding ◽  
Decoding Algorithms ◽  
Linear Block Codes ◽  
Temporal Complexity ◽  
Soft Decision Decoding

The use of decoding algorithms allows us to retrieve information after transmitting it over a noisy communication channel. Soft decision decoding is powerful in concatenation schemes that use two or more levels of decoding. In our case, we make a concatenation between the Hartmann & Rudolph (HR) algorithm as symbol-by-symbol decoder and the chase-2 algorithm that is word-to-word decoding algorithm. In this paper, we propose to combine two decoding algorithms for constructing a new one with more efficiency and less complexity. This work consists firstly to use the HR with a reduced number of codewords of the dual code then the Chase-2 algorithm which exploits the output of PHR. The simulations results and the comparisons made show that the proposed decoding scheme guarantees very good performance with reduced temporal complexity.

scholarly journals A Construction of High Performance Quasicyclic LDPC Codes: A Combinatoric Design Approach

2019 ◽  
Vol 2019 ◽  
pp. 1-10 ◽  
Author(s):  
Muhammad Asif ◽  
Wuyang Zhou ◽  
Muhammad Ajmal ◽  
Zain ul Abiden Akhtar ◽  
Nauman Ali Khan
Keyword(s):  
Iterative Decoding ◽  
High Performance ◽  
Linear Complexity ◽  
Signal To Noise Ratio ◽  
Additive White Gaussian Noise ◽  
Ldpc Codes ◽  
Combinatorial Designs ◽  
Parity Check ◽  
Excellent Performance ◽  
Moderate Length

This correspondence presents a construction of quasicyclic (QC) low-density parity-check (LDPC) codes based on a special type of combinatorial designs known as block disjoint difference families (BDDFs). The proposed construction of QC-LDPC codes gives parity-check matrices with column weight three and Tanner graphs having a girth lower-bounded by 6. The proposed QC-LDPC codes provide an excellent performance with iterative decoding over an additive white Gaussian-noise (AWGN) channel. Performance analysis shows that the proposed short and moderate length QC-LDPC codes perform as well as their competitors in the lower signal-to-noise ratio (SNR) region but outperform in the higher SNR region. Also, the codes constructed are quasicyclic in nature, so the encoding can be done with simple shift-register circuits with linear complexity.

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