Improving LDPC Decoding Performance for 3D TLC NAND Flash by LLR Optimization Scheme for Hard and Soft Decision

Low-density parity-check (LDPC) codes have been widely adopted in NAND flash in recent years to enhance data reliability. There are two types of decoding, hard-decision and soft-decision decoding. However, for the two types, their error correction capability degrades due to inaccurate log-likelihood ratio (LLR) . To improve the LLR accuracy of LDPC decoding, this article proposes LLR optimization schemes, which can be utilized for both hard-decision and soft-decision decoding. First, we build a threshold voltage distribution model for 3D floating gate (FG) triple level cell (TLC) NAND flash. Then, by exploiting the model, we introduce a scheme to quantize LLR during hard-decision and soft-decision decoding. And by amplifying a portion of small LLRs, which is essential in the layer min-sum decoder, more precise LLR can be obtained. For hard-decision decoding, the proposed new modes can significantly improve the decoder’s error correction capability compared with traditional solutions. Soft-decision decoding starts when hard-decision decoding fails. For this part, we study the influence of the reference voltage arrangement of LLR calculation and apply the quantization scheme. The simulation shows that the proposed approach can reduce frame error rate (FER) for several orders of magnitude.

An Efficient Decoding Algorithm for Block Codes Based on the Communication Channel Reliability Information

For channel codes in communication systems, an efficient algorithm that controls error is proposed. It is an algorithm for soft decision decoding of block codes. The sufficient conditions to obtain the optimum decoding are deduced so that the efficient method which explores candidate code words can be presented. The information vector of signal space codes has isomorphic coherence. The path metric in the coded demodulator is the selected components of scaled regions. The carrier decision is derived by the normalized metric of synchronized space. An efficient algorithm is proposed based on the method. The algorithm finds out a group of candidate code words, in which the most likely one is chosen as a decoding result. The algorithm reduces the complexity, which is the number of candidate code words. It also increases the probability that the correct code word is included in the candidate code words. It is shown that both the error probability and the complexity are reduced. The positions of the first hard-decision decoded errors and the positions of the unreliable bits are carefully examined. From this examination, the candidate codewords are efficiently searched for. The aim of this paper is to reduce the required number of hard-decision decoding and to lower the block error probability.