A Fast Fault-Identification Algorithm Tailored for Optical Interconnection Networks in High-Performance Computers

2014 ◽  
Vol 936 ◽  
pp. 2307-2312
Author(s):  
He Li
Keyword(s):  
Interconnection Networks ◽  
Decomposition Method ◽  
High Performance ◽  
Fault Identification ◽  
Optical Interconnection ◽  
Identification Algorithm ◽  
Cycle Decomposition ◽  
Diagnosis Algorithm ◽  
High Performance Computers

Due to integrated positive features of both hypercube and tori, optical multi-mesh hypercube (OMMH) networks in high-performance computers are regarded as a class of promising optical inter-connection networks. This paper firstly derive that the diagnosability of OMMH under the pessimistic strategy is (2n+6)/(2n+6), which shows that the OMMH possesses strong self-diagnosingability. With the improved cycle decomposition method by Yang in J. Parall. Distrib. Comput. [10], a fast diagnosis algorithm to identify all faulty nodes tailored for OMMH, which runs in O(Nlog2N) time is also proposed, where N is the number of the processors of an OMMH.

Communication Performance Evaluation of the Locally Twisted Cube

2020 ◽  
Vol 31 (02) ◽  
pp. 233-252
Author(s):  
Yuejuan Han ◽  
Lantao You ◽  
Cheng-Kuan Lin ◽  
Jianxi Fan
Keyword(s):  
Performance Evaluation ◽  
Interconnection Networks ◽  
High Performance ◽  
Communication Performance ◽  
Wide Diameter ◽  
Fault Diameter ◽  
Twisted Cube ◽  
Hypercube Network ◽  
High Performance Computers ◽  
Important Variant

The topology properties of multi-processors interconnection networks are important to the performance of high performance computers. The hypercube network [Formula: see text] has been proved to be one of the most popular interconnection networks. The [Formula: see text]-dimensional locally twisted cube [Formula: see text] is an important variant of [Formula: see text]. Fault diameter and wide diameter are two communication performance evaluation parameters of a network. Let [Formula: see text]), [Formula: see text] and [Formula: see text] denote the diameter, the [Formula: see text] fault diameter and the wide diameter of [Formula: see text], respectively. In this paper, we prove that [Formula: see text] if [Formula: see text] is an odd integer with [Formula: see text], [Formula: see text] if [Formula: see text] is an even integer with [Formula: see text].

Energy-Efficient Optical Interconnects in Cloud Computing Infrastructures

2013 ◽  
pp. 463-478
Author(s):  
Christoforos Kachris ◽  
Ioannis Tomkos
Keyword(s):  
Cloud Computing ◽  
Power Consumption ◽  
Interconnection Networks ◽  
Optical Interconnects ◽  
High Performance ◽  
Interconnection Network ◽  
Research Literature ◽  
Optical Interconnection ◽  
High Bandwidth ◽  
Cloud Infrastructures

This chapter discusses the rise of optical interconnection networks in cloud computing infrastructures as a novel alternative to current networks based on commodity switches. Optical interconnects can significantly reduce the power consumption and meet the future network traffic requirements. Additionally, this chapter presents some of the most recent and promising optical interconnects architectures for high performance data centers that have appeared recently in the research literature. Furthermore, it presents a qualitative categorization of these schemes based on their main features such as performance, connectivity, and scalability, and discusses how these architectures could provide green cloud infrastructures with reduced power consumption. Finally, the chapter presents a case study of an optical interconnection network that is based on high-bandwidth optical OFDM links and shows the reduction of the energy consumption that it can achieve in a typical data center.

Energy-Efficient Optical Interconnects in Cloud Computing Infrastructures

2013 ◽  
pp. 224-240 ◽  
Author(s):  
Christoforos Kachris ◽  
Ioannis Tomkos
Keyword(s):  
Cloud Computing ◽  
Power Consumption ◽  
Interconnection Networks ◽  
Optical Interconnects ◽  
High Performance ◽  
Interconnection Network ◽  
Research Literature ◽  
Optical Interconnection ◽  
High Bandwidth ◽  
Cloud Infrastructures

This chapter discusses the rise of optical interconnection networks in cloud computing infrastructures as a novel alternative to current networks based on commodity switches. Optical interconnects can significantly reduce the power consumption and meet the future network traffic requirements. Additionally, this chapter presents some of the most recent and promising optical interconnects architectures for high performance data centers that have appeared recently in the research literature. Furthermore, it presents a qualitative categorization of these schemes based on their main features such as performance, connectivity, and scalability, and discusses how these architectures could provide green cloud infrastructures with reduced power consumption. Finally, the chapter presents a case study of an optical interconnection network that is based on high-bandwidth optical OFDM links and shows the reduction of the energy consumption that it can achieve in a typical data center.

Efficient Instruction and Data Caching for High Performance Embedded Processors

1970 ◽  
pp. 9
Author(s):  
A. Ferrerón Labari ◽  
D. Suárez Gracia ◽  
V. Viñals Yúfera
Keyword(s):  
Embedded Systems ◽  
Power Consumption ◽  
Low Power ◽  
Interconnection Networks ◽  
High Performance ◽  
Critical Issue ◽  
Content Management ◽  
Structure Design ◽  
Portable Devices ◽  
On Chip

In the last years, embedded systems have evolved so that they offer capabilities we could only find before in high performance systems. Portable devices already have multiprocessors on-chip (such as PowerPC 476FP or ARM Cortex A9 MP), usually multi-threaded, and a powerful multi-level cache memory hierarchy on-chip. As most of these systems are battery-powered, the power consumption becomes a critical issue. Achieving high performance and low power consumption is a high complexity challenge where some proposals have been already made. Suarez et al. proposed a new cache hierarchy on-chip, the LP-NUCA (Low Power NUCA), which is able to reduce the access latency taking advantage of NUCA (Non-Uniform Cache Architectures) properties. The key points are decoupling the functionality, and utilizing three specialized networks on-chip. This structure has been proved to be efficient for data hierarchies, achieving a good performance and reducing the energy consumption. On the other hand, instruction caches have different requirements and characteristics than data caches, contradicting the low-power embedded systems requirements, especially in SMT (simultaneous multi-threading) environments. We want to study the benefits of utilizing small tiled caches for the instruction hierarchy, so we propose a new design, ID-LP-NUCAs. Thus, we need to re-evaluate completely our previous design in terms of structure design, interconnection networks (including topologies, flow control and routing), content management (with special interest in hardware/software content allocation policies), and structure sharing. In CMP environments (chip multiprocessors) with parallel workloads, coherence plays an important role, and must be taken into consideration.

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