Algorithmic Optimization of BDDs and Performance Evaluation for Multi-level Logic Circuits with Area and Power Trade-offs
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1996 ◽
Vol 25
(2)
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pp. 115-124
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2015 ◽
Vol 135
(6)
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pp. 221-229
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2014 ◽
Vol 15
(3)
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pp. 125-137
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