scholarly journals Algorithmic Optimization of BDDs and Performance Evaluation for Multi-level Logic Circuits with Area and Power Trade-offs

2011 ◽  
Vol 02 (03) ◽  
pp. 217-224 ◽  
Author(s):  
Saurabh Chaudhury ◽  
Anirban Dutta
1996 ◽  
Vol 25 (2) ◽  
pp. 115-124 ◽  
Author(s):  
Venkatapparao Mummalaneni ◽  
Khalid M. Dubas ◽  
Chiang-nan Chao

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