A Study on Statistical Simulation of Multicore Processor Architectures

Jongbok Lee

doi:10.7236/jiibc.2014.14.6.259

A Study on Statistical Simulation of Multicore Processor Architectures

The Journal of The Institute of Internet Broadcasting and Communication ◽

10.7236/jiibc.2014.14.6.259 ◽

2014 ◽

Vol 14 (6) ◽

pp. 259-265

Author(s):

Jongbok Lee

Keyword(s):

Statistical Simulation ◽

Multicore Processor ◽

Processor Architectures

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Performance Study of Asymmetric Multicore Processor Architectures

The Journal of The Institute of Internet Broadcasting and Communication ◽

10.7236/jiibc.2014.14.3.163 ◽

2014 ◽

Vol 14 (3) ◽

pp. 163-169 ◽

Cited By ~ 1

Author(s):

Jongbok Lee

Keyword(s):

Performance Study ◽

Multicore Processor ◽

Processor Architectures ◽

Asymmetric Multicore

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A Performance Study of Embedded Multicore Processor Architectures

The Journal of the Institute of Webcasting, Internet and Telecommunication ◽

10.7236/jiibc.2013.13.1.163 ◽

2013 ◽

Vol 13 (1) ◽

pp. 163-169 ◽

Cited By ~ 2

Author(s):

Jongbok Lee

Keyword(s):

Performance Study ◽

Multicore Processor ◽

Processor Architectures ◽

A Performance

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Implementing complex and multiple DSP systems on chip: developing a "tops-down" approach to multicore processor architectures

IET and Electronics Weekly Seminar on Programmable Hardware Systems ◽

10.1049/ic:20080611 ◽

2008 ◽

Author(s):

O. Gerkensmeyer

Keyword(s):

Multicore Processor ◽

Processor Architectures ◽

Systems On Chip ◽

On Chip ◽

Dsp Systems

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A Study On Statistical Simulation for Asymmetric Multi-Core Processor Architectures

The Journal of The Institute of Internet Broadcasting and Communication ◽

10.7236/jiibc.2016.16.2.157 ◽

2016 ◽

Vol 16 (2) ◽

pp. 157-163

Author(s):

Jongbok Lee ◽

Keyword(s):

Statistical Simulation ◽

Processor Architectures ◽

Multi Core Processor

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Performance Analysis of Multicore Processor Architectures Based On Cache Size Effects

The Journal of the Institute of Webcasting, Internet and Telecommunication ◽

10.7236/jiwit.2012.12.6.175 ◽

2012 ◽

Vol 12 (6) ◽

pp. 175-180 ◽

Cited By ~ 1

Author(s):

Jongbok Lee

Keyword(s):

Performance Analysis ◽

Size Effects ◽

Multicore Processor ◽

Processor Architectures ◽

Cache Size

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New array processor architectures for two-dimensional FIR digital filters

IEE Proceedings E Computers and Digital Techniques ◽

10.1049/ip-e.1989.0032 ◽

1989 ◽

Vol 136 (4) ◽

pp. 234 ◽

Cited By ~ 1

Author(s):

M.M. Fahmy ◽

Y. Wan

Keyword(s):

Digital Filters ◽

Two Dimensional ◽

Array Processor ◽

Processor Architectures ◽

Fir Digital Filters

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Three algorithms of statistical simulation in problems of optical communication on scattered radiation and bistatic sensing

Оптика атмосферы и океана ◽

10.15372/aoo20160506 ◽

2016 ◽

Keyword(s):

Optical Communication ◽

Scattered Radiation ◽

Statistical Simulation

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Efficient Face Detection on Epiphany Multicore Processor

COMPUTATIONAL MATHEMATICS AND INFORMATION TECHNOLOGIES ◽

10.23947/2587-8999-2017-1-1-113-127 ◽

2017 ◽

Vol 1 (1) ◽

pp. 113-127 ◽

Cited By ~ 2

Author(s):

A. A. Sukhinov ◽

◽

G. B. Ostrobrod ◽

Keyword(s):

Face Detection ◽

Multicore Processor

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Statistical Simulation of Life Cycle Cost

Proceedings of the international scientific conference Hradec Economic Days 2020 ◽

10.36689/uhk/hed/2020-01-095 ◽

2020 ◽

Author(s):

Jan Vlachý

Keyword(s):

Life Cycle ◽

Life Cycle Cost ◽

Statistical Simulation

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Analysis of Deblocking Filter for Efficienct Video Coding by Various Multicore Processor Based on Paralliazation

SSRN Electronic Journal ◽

10.2139/ssrn.3551068 ◽

2020 ◽

Author(s):

Burgoji santhosh kumar ◽

Sudhir Kumar Sharma

Keyword(s):

Video Coding ◽

Deblocking Filter ◽

Multicore Processor

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