voltage islands Latest Research Papers

TDMS Test Scheduler: An Integrated Framework for Test Scheduling of DVFS-based SoCs with Multiple Voltage Islands

2021 IEEE European Test Symposium (ETS) ◽

10.1109/ets50041.2021.9465426 ◽

2021 ◽

Author(s):

Fotios Vartziotis

Keyword(s):

Test Scheduling ◽

Integrated Framework ◽

Voltage Islands

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Energy Efficient Real Time Scheduling on Multi-core Processor with Voltage Islands

2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI) ◽

10.1109/icacci.2018.8554680 ◽

2018 ◽

Cited By ~ 1

Author(s):

Mayuri Digalwar ◽

Praveen Gahukar ◽

Sudeept Mohan

Keyword(s):

Real Time ◽

Energy Efficient ◽

Real Time Scheduling ◽

Time Scheduling ◽

Multi Core Processor ◽

Voltage Islands

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Test Structure with Variable Test Data Width of IP Cores for Multicore SoCs with DVS and Multiple Voltage Islands

2016 Sixth International Conference on Instrumentation & Measurement, Computer, Communication and Control (IMCCC) ◽

10.1109/imccc.2016.200 ◽

2016 ◽

Author(s):

Deng Libao ◽

Wang Sha ◽

Jin Chengyu ◽

Hu Cong

Keyword(s):

Test Data ◽

Test Structure ◽

Ip Cores ◽

Voltage Islands

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Energy efficient scheduling of real-time tasks on multi-core processors with voltage islands

Future Generation Computer Systems ◽

10.1016/j.future.2015.06.003 ◽

2016 ◽

Vol 56 ◽

pp. 202-210 ◽

Cited By ~ 10

Author(s):

Jun Liu ◽

Jinhua Guo

Keyword(s):

Real Time ◽

Energy Efficient ◽

Energy Efficient Scheduling ◽

Voltage Islands

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Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/tpds.2014.2323260 ◽

2015 ◽

Vol 26 (6) ◽

pp. 1608-1621 ◽

Cited By ~ 17

Author(s):

Santiago Pagani ◽

Jian-Jia Chen ◽

Minming Li

Keyword(s):

Energy Efficiency ◽

Voltage Islands

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Irregularly shaped voltage islands generation with hazard and heal strategy

Sixteenth International Symposium on Quality Electronic Design ◽

10.1109/isqed.2015.7085445 ◽

2015 ◽

Author(s):

Zhen Meng ◽

Song Chen ◽

Lu Huang

Keyword(s):

Voltage Islands

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Power optimization in a parallel multiplier using voltage islands

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) ◽

10.1109/iscas.2013.6571851 ◽

2013 ◽

Cited By ~ 1

Author(s):

Seok Won Heo ◽

Suk Joong Huh ◽

Milos D. Ercegovac

Keyword(s):

Power Optimization ◽

Parallel Multiplier ◽

Voltage Islands

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VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands

International Symposium on Quality Electronic Design (ISQED) ◽

10.1109/isqed.2013.6523673 ◽

2013 ◽

Cited By ~ 7

Author(s):

N. Kapadia ◽

S. Pasricha

Keyword(s):

Energy Efficient ◽

Efficient Synthesis ◽

Voltage Islands

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Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems

IEEE Transactions on Computers ◽

10.1109/tc.2011.229 ◽

2013 ◽

Vol 62 (2) ◽

pp. 268-278 ◽

Cited By ~ 17

Author(s):

Ozcan Ozturk ◽

Mahmut Kandemir ◽

Guangyu Chen

Keyword(s):

Embedded Systems ◽

Voltage Scaling ◽

Dynamic Voltage Scaling ◽

Energy Reduction ◽

Dynamic Voltage ◽

Directed Energy ◽

Voltage Islands

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Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2012.2203600 ◽

2012 ◽

Vol 31 (11) ◽

pp. 1754-1766 ◽

Cited By ~ 22

Author(s):

X. Kavousianos ◽

K. Chakrabarty ◽

A. Jain ◽

R. Parekhji

Keyword(s):

Voltage Scaling ◽

Dynamic Voltage Scaling ◽

Schedule Optimization ◽

Dynamic Voltage ◽

Test Schedule ◽

Voltage Islands

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voltage islands
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

TDMS Test Scheduler: An Integrated Framework for Test Scheduling of DVFS-based SoCs with Multiple Voltage Islands

Energy Efficient Real Time Scheduling on Multi-core Processor with Voltage Islands

Test Structure with Variable Test Data Width of IP Cores for Multicore SoCs with DVS and Multiple Voltage Islands

Energy efficient scheduling of real-time tasks on multi-core processors with voltage islands

Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands

Irregularly shaped voltage islands generation with hazard and heal strategy

Power optimization in a parallel multiplier using voltage islands

VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands

Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems

Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands

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voltage islandsRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

TDMS Test Scheduler: An Integrated Framework for Test Scheduling of DVFS-based SoCs with Multiple Voltage Islands

Energy Efficient Real Time Scheduling on Multi-core Processor with Voltage Islands

Test Structure with Variable Test Data Width of IP Cores for Multicore SoCs with DVS and Multiple Voltage Islands

Energy efficient scheduling of real-time tasks on multi-core processors with voltage islands

Energy Efficiency on Multi-Core Architectures with Multiple Voltage Islands

Irregularly shaped voltage islands generation with hazard and heal strategy

Power optimization in a parallel multiplier using voltage islands

VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands

Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems

Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands

voltage islands
Recently Published Documents