hypercube topology
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2021 ◽  
Vol 297 (3) ◽  
pp. 19-24
Author(s):  
V. Rusinov ◽  
◽  
O. Cherevatenko ◽  
L. Pustovit ◽  
O. Pustovit ◽  
...  

In this paper, the isoefficiency of MPP systems and heterogeneous CPU-GPU systems on the problem of discrete Fourier transform is considered. The development of parallel applications as its goal can not only reduce execution time, but also provide opportunities to solve problems of a larger dimension. The peculiarity of algorithm parallelization includes the efficient use of hardware while increasing the dimension of the problem is an important characteristic of parallel computing. However, currently heterogeneous systems have not been researched extensively to determine isoefficiency characteristics and build application-specific systems around said method, although there are articles that show potential using isoefficiency to design the system and using heterogeneous approach to accelerate performance of different tasks. Discrete Fourier Transform algorithm lets build systems that discretize analogue and digital signals and it can serve as a benchmark to test different systems. Algorithms suited for MPP systems can use analytical approach to find out issoefficiency function and to determine how scaling the system or changing the size of the task will change its performance metrics. One of the most popular approaches to linking up processing units in MPP systems is using hypercube topology. MPP system that is connected using this topology will be analyzed. CPU-GPU heterogeneous system will be analyzed using an approach based on polynomial regression. Due to the nature of heterogeneous systems, analytic approach used in MPP system is impossible. Predictive model based on polynomial regression will use modelling results from using CPU and GPU separately to estimate how much time it will take for heterogeneous system to finish the task. To ensure accuracy of the experiment, several systems will be used to model the task. Using this approach, resulting issoefficient heterogeneous system will be analyzed using performance metrics s


2021 ◽  
Vol 295 (2) ◽  
pp. 89-96
Author(s):  
P. REHIDA ◽  
◽  
I. KOMISAROV ◽  

In this article, the bubble scheduling and allocation algorithm is considered for different types of topologies: grid, hypercube, de Bruijn topology, extended de Bruijn topology based on ternary code. Static planning algorithms are analyzed; the results are presented in the form of a comparative table on the criteria of complexity, the need to find a critical path, the presence of a table of routing and efficiency. The study of the method of planning calculations is carried out based on the problem of finding the roots of systems of linear and nonlinear equations using Cramer’s and Newton’s methods. The corresponding graphs of tier-parallel form are synthesized for these methods. The principles of synthesis for 4 types of topologies are shown. The synthesis of the grid, hypercube, and de Bruijn graph is considered in the classical form. The synthesis of the extended de Bruijn topology is a synthesis of de Bruijn topology [1, 2] using a ternary code. That is, with the same number of processors, the number of connections increases. Experimental studies of the scheduling of the obtained graphs in the synthesized topologies using the method of bubble scheduling and allocation are conducted; the results of scheduling are presented for these topologies. The best results were shown by extended de Bruijn topology based on ternary code due to the increased degree of units, which is especially noticeable for Newton’s method where there are much more data transfers than in Cramer’s method. The topology of a hypercube and de Bruijn topology demonstrated just about same results but hypercube topology did a little better. In addition to this, having a smaller diameter and cost, the hypercube is the most optimal topology and still used today. However, when constructing fail-safe topological organizations, it is better to use topologies based on ternary code, such as the topology based on the extended de Bruijn graph.


2021 ◽  
Vol 680 (1) ◽  
pp. 505-519
Author(s):  
Adnan A. Hnaif ◽  
Abdelfatah A. Tamimi ◽  
Ayman M. Abdalla ◽  
Iqbal Jebril

Enormously parallel distribution memory designs are accepting and expanding regard to satisfy the expanding need on processing power. Numerous topologies have been projected for interconnecting the processors of distributed computing systems. The hypercube topology has attracted significant consideration because of a significant number of attractive properties. The engaging properties of the hypercube topology, for example, vertex and edge balance, recursive structure, logarithmic diameter, maximally fault-tolerance, simple routing and broadcasting, and the capacity to recreate other interconnection systems with least overhead have made it a brilliant possibility for some parallel processing applications. Numerous varieties of the hypercube topology have been accounted for the literature, mostly to add the computational power of the hypercube. One of the gorgeous versions of the hypercube was introduced for the improvement of the presented Exchanged hypercube. An Exchanged hypercube has the equivalent structural complexities of the hypercube. It protects the gorgeous properties of the hypercube and diameter the communication time by dropping the diameter by a factor of two. This paper presents the fundamental communication and some of the essential operations normally required in parallel computing on the Exchanged hypercube interconnection networks.


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