SEMI-SUPERVISED SEMANTIC SEGMENTATION NETWORK VIA LEARNING CONSISTENCY FOR REMOTE SENSING LAND-COVER CLASSIFICATION

Current popular deep neural networks for semantic segmentation are almost supervised and highly rely on a large amount of labeled data. However, obtaining a large amount of pixel-level labeled data is time-consuming and laborious. In remote sensing area, this problem is more urgent. To alleviate this problem, we propose a novel semantic segmentation neural network (S4Net) based on semi-supervised learning by using unlabeled data. Our model can learn from unlabeled data by consistency regularization, which enforces the consistency of output under different random transforms and perturbations, such as random affine transform. Thus, the network is trained by the weighted sum of a supervised loss from labeled data and a consistency regularization loss from unlabeled data. The experiments we conducted on DeepGlobe land cover classification challenge dataset verified that our network can make use of unlabeled data to obtain precise results of semantic segmentation and achieve competitive performance when compared to other methods.

CPU-GPU Rendering of CT Scan Images for Vertebra Reconstruction from CT Scan Images with a Calibration Policy

In this work GPU implementation of classic 3D visualization algorithms namely Marching Cubes and Raycasting has been carried for cervical vertebra using VTK libraries. A proposed framework has been introduced for efficient and duly calibrated 3D reconstruction using Dicom Affine transform and Python Mayavi framework to address the limitation of benchmark visualization techniques i.e. lack of calibration, surface reconstruction artifacts and latency.

Image Enhancement Using hybrid Fresnel Phase mask, hybrid mask and singular value decomposition in Affine and Fresnel Transform domain

Background: An asymmetric cryptanalysis is suggested in Affine and Fresnel transform using hybrid Fresnel Phase Mask (HFM), hybrid Mask (HM) and singular value decomposition (SVD) to deliver additional security to the scheme. The usage of Affine transform (AT) provides randomness in the input plane which benefits in enlarging the key space and SVD gives the non-linearity in the process. Objective: In the FrT domain, usage of hybrid masks and AT in an asymmetric cryptosystem with SVD is to make encoded procedure difficult. Method: On the plain image we firstly apply affine transform and then convoluted it with HFM, in FrT domain with propagation distance Z1 and the obtained part is convoluted with HM in FrT with propagation distance Z2 and then lastly on the encoded image SVD is applied. Results: Validity of the suggested scheme have been confirmed by using MATLAB R2018a (9.4.0.813654). The capability of the recommended scheme has been tested by statistical simulations such as histogram, entropy and correlation coefficient. Noise attack analysis has also done so that the system becomes robust against attacks. Conclusion: Asymmetric cryptosystem is recommended using pixel scrambling technique i.e. affine transform which shuffles the pixels hence helps for security of the system. Usage of SVD in the algorithm is to make the system robust. Performance and strength analysis are carried out for scrutiny of the forte and feasibility of the algorithm.

Fast Execution of an ASIFT Hardware Accelerator by Prior Data Processing

This paper proposes a new ASIFT hardware architecture that processes a Video Graphics Array (VGA)-sized (640 × 480) video in real time. The previous ASIFT accelerator suffers from low utilization because affine transformed images are computed repeatedly. In order to improve hardware utilization, the proposed hardware architecture adopts two schemes to increase the utilization of a bottleneck hardware module. The first is a prior anti-aliasing scheme, and the second is a prior down-scaling scheme. In the proposed method, 1 × 1 and 0.5 × 1 blurred images are generated and they are reused for creating various affine transformed images. Thanks to the proposed schemes, the utilization drop by waiting for the affine transform is significantly decreased, and consequently, the operation speed is increased substantially. Experimental results show that the proposed ASIFT hardware accelerator processes a VGA-sized video at the speed of 28 frames/s, which is 1.36 times faster than that of previous work.