Tight Upper Bound for Accelerating Reconfiguration of VLSI Arrays

Reconfiguring a very large scale integration (VLSI) array with faults is to construct a maximum logical sub-array (target array) without faults. A large target array implies a good harvest of the corresponding reconfiguration algorithm. Thus, a tight upper bound of the harvest can be directly used to evaluate the performance of the reconfiguration algorithm. This paper presents a new approach to calculate the upper bound of the harvest for the VLSI arrays with clustered faults. The latest upper bound is successfully reduced and the proposed technique to calculate the upper bound is bound into a reconfiguration algorithm cited in this paper. Simulation results show that the upper bound is reduced up to 20% on 256 × 256 array with clustered faults, and the corresponding reconfiguration process is significantly accelerated over 30%, without loss of harvest.