Efficient Scheduling for Real-Time Pinwheel Tasks on DVS Processors

In this paper, we focus on the pinwheel task model for a variable voltage processor with d discrete voltage/speed levels. We propose an intra-task DVS algorithm which constructs a minimum energy schedule for k tasks in O(d+ k log k) time. Previous approaches solve this problem by generating a canonical schedule beforehand and adjusting the tasks' speed in O(dn log n) or O(n3) time. However, the length of a canonical schedule depends on the hyperperiod of those task periods and is of exponential length in general. In our approach, the tasks with arbitrary periods are first transformed into harmonic periods and then profile their key features. Afterward, an optimal discrete voltage schedule can be computed directly from those features.

ENERGY-CONSTRAINED VDD HOPPING SCHEME WITH RUN-TIME POWER ESTIMATION FOR LOW-POWER REAL-TIME VLSI SYSTEMS

In this paper, we propose a novel dynamic voltage scaling algorithm on a variable-voltage processor. It determines the supply voltage on timeslot-by-timeslot basis within the task boundary, and significantly reduces the power consumption by fully exploiting the slack time. Also, we modify this algorithm and propose an energy-constrained dynamic voltage scaling algorithm for low-power multimedia applications. In the multimedia applications, there are usually several alternative algorithms with different performance and power. Considering the trade-off between performance and power, the proposed algorithm adaptively determines the optimal alternative to achieve optimal performance under given energy constraint. Compared with the conventional algorithms, the power consumption is reduced to 1/14.4 ~ 1/5.6 without performance degradation.