2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)
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9781479911707

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Power contracts: A formal way towards power-closure?!

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662156 ◽

2013 ◽

Cited By ~ 4

Author(s):

Gregor Nitsche ◽

Kim Gruttner ◽

Wolfgang Nebel

Keyword(s):

Power Contracts

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Formal system-on-chip verification: An operation-based methodology and its perspectives in low power design

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662157 ◽

2013 ◽

Author(s):

Joakim Urdahl ◽

Shrinidhi Udupi ◽

Dominik Stoffel ◽

Wolfgang Kunz

Keyword(s):

Low Power ◽

Formal System ◽

Low Power Design ◽

System On Chip ◽

On Chip

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Maximizing yield in Near-Threshold Computing under the presence of process variation

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662148 ◽

2013 ◽

Cited By ~ 6

Author(s):

Nathaniel A. Conos ◽

Saro Meguerdichian ◽

Sheng Wei ◽

Miodrag Potkonjak

Keyword(s):

Process Variation ◽

Near Threshold

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Design methodology for low-power embedded microprocessors

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662184 ◽

2013 ◽

Cited By ~ 1

Author(s):

Andrea Manuzzato ◽

Fabio Campi ◽

Valentino Liberali ◽

Davide Pandini

Keyword(s):

Low Power ◽

Design Methodology

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Efficient power Intent validation using loosely-timed simulation models

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662171 ◽

2013 ◽

Cited By ~ 2

Author(s):

Fabian Mischkalla ◽

Wolfgang Mueller

Keyword(s):

Simulation Models ◽

Efficient Power

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Design of variable latency adder based on present and transitional states prediction

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662164 ◽

2013 ◽

Cited By ~ 3

Author(s):

Xinghua Yang ◽

Fei Qiao ◽

Chang Liu ◽

Huazhong Yang

Keyword(s):

Variable Latency

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Automatic implementation of low-complexity QC-LDPC encoders

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662182 ◽

2013 ◽

Cited By ~ 1

Author(s):

Georgios Tzimpragos ◽

Christoforos Kachris ◽

Dimitrios Soudris ◽

Ioannis Tomkos

Keyword(s):

Low Complexity

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Design of future integrated systems: A cyber-physical systems approach

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662146 ◽

2013 ◽

Author(s):

Radu Marculescu

Keyword(s):

Systems Approach ◽

Cyber Physical Systems ◽

Integrated Systems ◽

Physical Systems

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Design methodology for low-power embedded microprocessors

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662187 ◽

2013 ◽

Cited By ~ 1

Author(s):

Andrea Manuzzato ◽

Fabio Campi ◽

Valentino Liberali ◽

Davide Pandini

Keyword(s):

Low Power ◽

Design Methodology

Download Full-text

Metastability characterization for muller C-elements

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2013.6662170 ◽

2013 ◽

Cited By ~ 5

Author(s):

Thomas Polzer ◽

Andreas Steininger

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2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Power contracts: A formal way towards power-closure?!

Formal system-on-chip verification: An operation-based methodology and its perspectives in low power design

Maximizing yield in Near-Threshold Computing under the presence of process variation

Design methodology for low-power embedded microprocessors

Efficient power Intent validation using loosely-timed simulation models

Design of variable latency adder based on present and transitional states prediction

Automatic implementation of low-complexity QC-LDPC encoders

Design of future integrated systems: A cyber-physical systems approach

Design methodology for low-power embedded microprocessors

Metastability characterization for muller C-elements

2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)
Latest Publications