2010 International Conference on Field-Programmable Technology
Latest Publications

TOTAL DOCUMENTS

103

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Published By IEEE

9781424489800

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FPGA implementation of GZIP compression and decompression for IDC services

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681489 ◽

2010 ◽

Cited By ~ 9

Author(s):

Jian Ouyang ◽

Hong Luo ◽

Zilong Wang ◽

Jiazi Tian ◽

Chenghui Liu ◽

...

Keyword(s):

Fpga Implementation

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Technology issues facing the world's largest integrated circuits

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681478 ◽

2010 ◽

Author(s):

Stephen Brown

Keyword(s):

Integrated Circuits

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Bringing FPGA design to application domain experts

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681477 ◽

2010 ◽

Cited By ~ 2

Author(s):

James Truchard

Keyword(s):

Application Domain ◽

Fpga Design ◽

Domain Experts

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A 64-context MEMS optically reconfigurable gate array

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681467 ◽

2010 ◽

Author(s):

Yuichiro Yamaji ◽

Minoru Watanabe

Keyword(s):

Gate Array

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High performance and memory efficient implementation of matrix multiplication on FPGAs

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681769 ◽

2010 ◽

Cited By ~ 5

Author(s):

Guiming Wu ◽

Yong Dou ◽

Miao Wang

Keyword(s):

High Performance ◽

Matrix Multiplication ◽

Efficient Implementation ◽

Memory Efficient

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Performance estimation framework for FPGA-based processors

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681448 ◽

2010 ◽

Cited By ~ 2

Author(s):

Yan Lin Aung ◽

Siew Kei Lam ◽

Thambipillai Srikanthan

Keyword(s):

Performance Estimation

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Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681431 ◽

2010 ◽

Cited By ~ 1

Author(s):

Kazuei Hironaka ◽

Masayuki Kimura ◽

Yoshiki Saito ◽

Toru Sano ◽

Masaru Kato ◽

...

Keyword(s):

Power Consumption ◽

Reducing Power ◽

Processor Array ◽

Reconfigurable Processor ◽

Dynamically Reconfigurable

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Lightweight DPA resistant solution on FPGA to counteract power models

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681790 ◽

2010 ◽

Cited By ~ 2

Author(s):

Y. Lu ◽

K.-H. Boey ◽

P. Hodgers ◽

M. O'Neill

Keyword(s):

Power Models

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Fine-grained characterization of process variation in FPGAs

2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681770 ◽

2010 ◽

Cited By ~ 12

Author(s):

Haile Yu ◽

Qiang Xu ◽

Philip H.W. Leong

Keyword(s):

Process Variation ◽

Fine Grained

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2010 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2010.5681473 ◽

2010 ◽

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2010 International Conference on Field-Programmable Technology
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

FPGA implementation of GZIP compression and decompression for IDC services

Technology issues facing the world's largest integrated circuits

Bringing FPGA design to application domain experts

A 64-context MEMS optically reconfigurable gate array

High performance and memory efficient implementation of matrix multiplication on FPGAs

Performance estimation framework for FPGA-based processors

Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping

Lightweight DPA resistant solution on FPGA to counteract power models

Fine-grained characterization of process variation in FPGAs

Table of contents

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2010 International Conference on Field-Programmable TechnologyLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

FPGA implementation of GZIP compression and decompression for IDC services

Technology issues facing the world's largest integrated circuits

Bringing FPGA design to application domain experts

A 64-context MEMS optically reconfigurable gate array

High performance and memory efficient implementation of matrix multiplication on FPGAs

Performance estimation framework for FPGA-based processors

Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping

Lightweight DPA resistant solution on FPGA to counteract power models

Fine-grained characterization of process variation in FPGAs

Table of contents

2010 International Conference on Field-Programmable Technology
Latest Publications