Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07
Latest Publications

TOTAL DOCUMENTS

119

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Published By ACM Press

9781595936059

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228900 ◽

2007 ◽

Cited By ~ 5

Author(s):

Olga Golubeva ◽

Mirko Loghi ◽

Massimo Poncino

Keyword(s):

Energy Efficiency ◽

Shared Memory ◽

Chip Multiprocessors ◽

Single Chip ◽

Synchronization Primitives

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Combinational equivalence checking for threshold logic circuits

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228813 ◽

2007 ◽

Cited By ~ 16

Author(s):

Tejaswi Gowda ◽

Sarma Vrudhula ◽

Goran Konjevod

Keyword(s):

Logic Circuits ◽

Equivalence Checking ◽

Threshold Logic

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On-chip characterization of molecular electronic devices using CMOS

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228814 ◽

2007 ◽

Cited By ~ 3

Author(s):

Nadine Gergel-Hackett ◽

Garrett S. Rose ◽

Peter Paliwoda ◽

Christina A. Hacker ◽

Curt A. Richter

Keyword(s):

Electronic Devices ◽

Molecular Electronic ◽

On Chip ◽

Molecular Electronic Devices

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An effective buffer planning algorithm for IP based fixed-outline SOC placement

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228917 ◽

2007 ◽

Author(s):

Ou He ◽

Sheqin Dong ◽

Jinian Bian ◽

Yuchun Ma ◽

Xianlong Hong

Keyword(s):

Buffer Planning ◽

Planning Algorithm ◽

Effective Buffer

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Sensitive registers

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228820 ◽

2007 ◽

Author(s):

A. Robinson ◽

J. D. Garside

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Beyond 3G wireless communication system prototype

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228865 ◽

2007 ◽

Author(s):

Alberto Dassatti ◽

Simone Zezza ◽

Mario Nicola ◽

Guido Masera

Keyword(s):

Wireless Communication ◽

Communication System ◽

Beyond 3G ◽

Wireless Communication System ◽

System Prototype

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A new algorithm for the largest compositionally progressive solution of synchronous language equations

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228888 ◽

2007 ◽

Author(s):

Tiziano Villa ◽

Svetlana Zharikova ◽

Nina Yevtushenko ◽

Robert Brayton ◽

Alberto Sangiovanni-Vincentelli

Keyword(s):

Language Equations ◽

Synchronous Language

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Modeling and estimating leakage current in series-parallel CMOS networks

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228852 ◽

2007 ◽

Cited By ~ 1

Author(s):

Paulo F. Butzen ◽

Andre I. Reis ◽

Chris H. Kim ◽

Renato P. Ribas

Keyword(s):

Leakage Current ◽

In Series

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An efficient cost-based canonical form for Boolean matching

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228889 ◽

2007 ◽

Author(s):

Giovanni Agosta ◽

Francesco Bruschi ◽

Donatella Sciuto

Keyword(s):

Canonical Form ◽

Boolean Matching

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Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 ◽

10.1145/1228784.1228826 ◽

2007 ◽

Cited By ~ 15

Author(s):

Zhenyu Liu ◽

Yiqing Huang ◽

Yang Song ◽

Satoshi Goto ◽

Takeshi Ikenaga

Keyword(s):

Motion Estimation ◽

Block Size ◽

Variable Block

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Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors

Combinational equivalence checking for threshold logic circuits

On-chip characterization of molecular electronic devices using CMOS

An effective buffer planning algorithm for IP based fixed-outline SOC placement

Sensitive registers

Beyond 3G wireless communication system prototype

A new algorithm for the largest compositionally progressive solution of synchronous language equations

Modeling and estimating leakage current in series-parallel CMOS networks

An efficient cost-based canonical form for Boolean matching

Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC

Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07
Latest Publications