Approximate analog computing with metatronic circuits

Analog photonic solutions offer unique opportunities to address complex computational tasks with unprecedented performance in terms of energy dissipation and speeds, overcoming current limitations of modern computing architectures based on electron flows and digital approaches. The lack of modularization and lumped element reconfigurability in photonics has prevented the transition to an all-optical analog computing platform. Here, we explore, using numerical simulation, a nanophotonic platform based on epsilon-near-zero materials capable of solving in the analog domain partial differential equations (PDE). Wavelength stretching in zero-index media enables highly nonlocal interactions within the board based on the conduction of electric displacement, which can be monitored to extract the solution of a broad class of PDE problems. By exploiting the experimentally achieved control of deposition technique through process parameters, used in our simulations, we demonstrate the possibility of implementing the proposed nano-optic processor using CMOS-compatible indium-tin-oxide, whose optical properties can be tuned by carrier injection to obtain programmability at high speeds and low energy requirements. Our nano-optical analog processor can be integrated at chip-scale, processing arbitrary inputs at the speed of light.

Low-Power CMOS Complex Bandpass Filter with Passband Flatness Tunability

We present a low-power CMOS active-resistance-capacitance (active-RC) complex bandpass filter (BPF) with tunable gain, bandwidth, center frequency, quality factor, and passband flatness for Bluetooth applications. A transfer function analysis for a cross-coupled Tow-Thomas biquad structure is presented to prove that the flatness profile of the passband gain can be effectively controlled by independently tuning two cross-coupling resistors. The proposed biquad-based complex BPF was employed to realize a fourth-order baseband analog processor for a low intermediate frequency (low-IF) RF receiver. The baseband analog processor was composed of two complex biquad filters and three first-order variable-gain amplifiers. It was fabricated in a 65-nm RF CMOS and achieved wide tuning capabilities, such as a gain of −15.6 to 50.6 dB, a bandwidth of 1.4–3.9 MHz, a center frequency of 1.5–4.1 MHz, and a passband flatness of −1 to 1 dB. It also achieved an image rejection ratio of 40.3–53.3 dB across the entire gain tuning range. It consumed 1.4 mA from a 1 V supply and occupied an area of 0.19 mm2 on the silicon substrate. The implementation results prove that the proposed complex BPF was able to effectively enhance the signal processing performances through the flexible and wide-range tunability of the passband flatness, as well as that of the gain, bandwidth, center frequency, and quality factor.

CIRCUIT-BASED APPROACHES TO SIMPL SYSTEMS

This paper presents circuit-based approaches to SIMPL Systems (SIMulation Possible, but Laborious Systems), which could be regarded as a "public-key" version of Physical Unclonable Functions. The use of these systems can help us to avoid some of the potential vulnerabilities of conventional cryptography, such as its dependency on secret binary keys. Two specially designed circuits for SIMPL systems are discussed: "skew" memories and massively parallel analog processor arrays known as Cellular Nonlinear Networks. We argue that these circuits are able to serve as SIMPL systems in practice, and discuss their security against numerical and physical attacks.