2009 4th International Design and Test Workshop (IDT)
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84

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6

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Published By IEEE

9781424457489

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Figures of merit to characterize the importance of skin and proximity effects

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404149 ◽

2009 ◽

Author(s):

Ahmed Shebaita ◽

Dusan Petranovic ◽

Yehea Ismail

Keyword(s):

Proximity Effects ◽

Figures Of Merit

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Tuned voltage controlled oscillator using quantum dot transistor

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404150 ◽

2009 ◽

Author(s):

El-Sayed A. M. Hasaneen

Keyword(s):

Quantum Dot ◽

Voltage Controlled Oscillator

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A delay-aware topology-based design for Networks-on-Chip applications

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404136 ◽

2009 ◽

Author(s):

Haytham Elmiligi ◽

Ahmed A. Morgan ◽

M. Watheq El-Kharashi ◽

Fayez Gebali

Keyword(s):

Networks On Chip ◽

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Stable optical filter using porous silicon technology

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404100 ◽

2009 ◽

Author(s):

Mostafa M. Hassan ◽

Ahmed Hisham Morshed ◽

Diaa Khalil

Keyword(s):

Porous Silicon ◽

Optical Filter ◽

Silicon Technology

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Static power optimization of a Full-Adder under Front-End of Line systematic variations

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404117 ◽

2009 ◽

Author(s):

Hossein Aghababa ◽

Ali Afzali-Kusha ◽

Behjat Forouzandeh

Keyword(s):

Power Optimization ◽

Front End ◽

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An integrated ESD design verification flow

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404125 ◽

2009 ◽

Author(s):

Hazem Hegazy

Keyword(s):

Design Verification

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A modified bus invert method for the submicron technology

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404371 ◽

2009 ◽

Author(s):

Mahdi Moradinasab ◽

Siamak Mehrnami ◽

Rasul Yousefi

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Implementing a methodology for process variation awareness of design context and its impact on circuit analysis

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404115 ◽

2009 ◽

Author(s):

Rami F. Salem ◽

Hesham M. AbdelGhany ◽

Abd ElRahman ElMously ◽

Haitham M. Eissa ◽

Mohab H. Anis

Keyword(s):

Process Variation ◽

Circuit Analysis

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A class of single-stage and multi-stage lowpass delta-sigma modulators in 1.2-V 0.13-µm CMOS

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404372 ◽

2009 ◽

Author(s):

M. Momeni ◽

M. Glesner

Keyword(s):

Single Stage ◽

Multi Stage ◽

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FPGA based selective harmonic elimination pulse width modulation technique

2009 4th International Design and Test Workshop (IDT) ◽

10.1109/idt.2009.5404137 ◽

2009 ◽

Author(s):

Basil M. Saied ◽

Shefa A. Dawwd ◽

Ahmad S. Al-Soufi

Keyword(s):

Pulse Width ◽

Pulse Width Modulation ◽

Modulation Technique ◽

Harmonic Elimination ◽

Selective Harmonic Elimination

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