2014 20th IEEE International Symposium on Asynchronous Circuits and Systems
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9781479937899
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Performance and Area Optimization of a Bundled-Data Intel Processor through Resynthesis

2014 ◽  
Author(s):  
Arash Saifhashemi ◽  
Dylan Hand ◽  
Peter A. Beerel ◽  
William Koven ◽  
Hong Wang
Keyword(s):  
Area Optimization

scholarly journals Semi-custom NCL Design with Commercial EDA Frameworks: Is it Possible?

2014 ◽  
Author(s):  
Matheus Moreira ◽  
Augusto Neutzling ◽  
Mayler Martins ◽  
Andre Reis ◽  
Renato Ribas ◽  
...  

scholarly journals A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design

2014 ◽  
Author(s):  
Matheus Trevisan Moreira ◽  
Michel Evandro Arendt ◽  
Ricardo Aquino Guazzelli ◽  
Ney Laert Vilar Calazans
Keyword(s):  
Low Voltage ◽  
Logic Gates ◽  
Null Convention Logic

scholarly journals An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults

2014 ◽  
Author(s):  
Guangda Zhang ◽  
Wei Song ◽  
Jim Garside ◽  
Javier Navaridas ◽  
Zhiying Wang
Keyword(s):  
Network On Chip ◽  
Permanent Faults ◽  
On Chip

Test and Repair Flow for Shared BISR in Asynchronous Multi-processors

2014 ◽  
Author(s):  
Gang Wang ◽  
Xu Wang ◽  
Xinke Chen ◽  
Shuangbai Xue

Low Power Asynchronous VLSI with NEM Relays

2014 ◽  
Author(s):  
Benjamin Z. Tang ◽  
Sunil A. Bhave ◽  
Rajit Manohar
Keyword(s):  
Low Power ◽  
Asynchronous Vlsi
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