2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517)
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Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

The simple link protocol: a zero-overhead packet delineation scheme for high-speed Ethernet

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934484 ◽

2002 ◽

Author(s):

T.E. Truman ◽

Leilei Song ◽

K. Azadet

Keyword(s):

High Speed ◽

Simple Link

Fast placement-dependent full chip thermal simulation

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934531 ◽

2002 ◽

Cited By ~ 2

Author(s):

Zhiping Yu ◽

D. Yergeau ◽

R.W. Dutton ◽

S. Nakagawa ◽

J. Deeney

Keyword(s):

Thermal Simulation ◽

Fast Placement

Array transistor design challenges in trench capacitor DRAM technology

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934489 ◽

2002 ◽

Author(s):

Yujun Li ◽

Jai-Hoon Sim ◽

J. Mandelman ◽

K. McStay ◽

Qiuyi Ye ◽

...

Keyword(s):

Design Challenges

A 5 GHz band CMOS low noise amplifier with a 2.5 dB noise figure

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934525 ◽

2002 ◽

Cited By ~ 32

Author(s):

E.H. Westerwick

Keyword(s):

Noise Figure ◽

Low Noise ◽

Low Noise Amplifier ◽

Noise Amplifier ◽

5 Ghz

A study of bimodal distributions of time-to-failure of copper via electromigration

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934537 ◽

2002 ◽

Cited By ~ 2

Author(s):

J.B. Lai ◽

J.L. Yang ◽

Y.P. Wang ◽

S.H. Chang ◽

R.L. Hwang ◽

...

Keyword(s):

Time To Failure

Stack capacitor integration with buried oxygen barrier using chemical mechanical polishing of noble metals

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934535 ◽

2002 ◽

Author(s):

R.F. Schnabel ◽

G. Beitel ◽

P. Bosk ◽

C. Dehm ◽

A. Hauser ◽

...

Keyword(s):

Chemical Mechanical Polishing ◽

Noble Metals ◽

Mechanical Polishing ◽

Oxygen Barrier

A lithographically-friendly 6F/sup 2/ DRAM cell

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934492 ◽

2002 ◽

Author(s):

S. Bukofsky ◽

J. Mandelman ◽

A. Thomas ◽

C. Radens ◽

G. Kunkel

Early-late gate receiving for Bluetooth packet

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934482 ◽

2002 ◽

Author(s):

Chia-Sheng Peng ◽

Ming-Hung Chang ◽

Kuei-Ann Wen

Keyword(s):

Early Late

On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934529 ◽

2002 ◽

Cited By ~ 2

Author(s):

Chyh-Yih Chang ◽

Ming-Dou Ker

Keyword(s):

Integrated Circuits ◽

Cmos Process ◽

Rf Integrated Circuits ◽

Esd Protection ◽

On Chip

Design and implementation of a routing switch for irregular interconnection networks

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934486 ◽

2002 ◽

Author(s):

Hsin-Chou Chi ◽

Chia-Ming Wu

Keyword(s):

Interconnection Networks ◽

Design And Implementation

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

The simple link protocol: a zero-overhead packet delineation scheme for high-speed Ethernet

Fast placement-dependent full chip thermal simulation

Array transistor design challenges in trench capacitor DRAM technology

A 5 GHz band CMOS low noise amplifier with a 2.5 dB noise figure

A study of bimodal distributions of time-to-failure of copper via electromigration

Stack capacitor integration with buried oxygen barrier using chemical mechanical polishing of noble metals

A lithographically-friendly 6F/sup 2/ DRAM cell

Early-late gate receiving for Bluetooth packet

On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

Design and implementation of a routing switch for irregular interconnection networks

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517)
Latest Publications